Meets or Exceeds the Requirements of
ANSI EIA/TIA-422-B and -423-B
D
Meets or Exceeds the Requirements of
ANSI EIA/TIA-232-E and ITU
Recommendation V.28 With External
Components
D
Meets Federal Standards 1020 and 1030
D
Built-in 5-MHz Low-Pass Filter
D
Operates From Single 5-V Power Supply
D
Wide Common-Mode Voltage Range
D
High Input Impedance
D
TTL-Compatible Outputs
D
8-Pin Dual-in-Line Package
D
Pinout Compatible With the µA9637 and
µA9639
THE SN75146 IS NOT RECOMMENDED
D OR P PACKAGE
(TOP VIEW)
V
CC
1OUT
2OUT
GND
1
2
3
4
1IN+
8
1IN–
7
2IN+
6
2IN–
5
FOR NEW DESIGNS.
description
The SN75146 is a dual differential line receiver designed to meet ANSI Standards EIA/TIA-422-B and -423-B.
The receiver is designed to have a constant impedance with input voltages of ±3 V to ±25 V allowing it to meet
the requirements of EIA/TIA-232-E and ITU recommendation V.28 with the addition of an external bias resistor .
This receiver is designed for low-speed operation below 355 kHz and has a built-in 5-MHz low-pass filter to
attenuate high-frequency noise. The inputs are compatible with either a single-ended or a differential line
system and the outputs are TTL compatible. This device operates from a single 5-V power supply and is
supplied in both the 8-pin dual-in-line and small-outline packages.
The SN75146 is characterized for operation from 0°C to 70°C.
logic symbol
1IN+
1IN–
2IN+
2IN–
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
†
8
7
6
5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
1OUT
3
2OUT
logic diagram
1IN+
1IN–
2IN+
2IN–
8
7
6
5
2
1OUT
3
2OUT
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
SN75146
DUAL DIFFERENTIAL LINE RECEIVER
SLLS015B – FEBRUARY 1986 – REVISED MAY 1995
schematics of inputs and outputs
EQUIVALENT OF EACH INPUTTYPICAL OF ALL OUTPUTS
V
CC
Input
740 Ω NOM
7.4 kΩ NOM
740 Ω NOM
R1
7.41 R1
V
CC
50 Ω NOM
Output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Operating free-air temperature range, T
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
Supply voltage, V
Common-mode input voltage, V
Operating free-air temperature, T
2
CC
IC
A
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISSIPATION RATING TABLE
TA ≤ 25°C
OPERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
MINNOMMAXUNIT
4.7555.25V
±7V
02570°C
VITThreshold input voltage (V
and V
)
V
riInput resistance
II
,
6
7.8
10.5
kΩ
IIInput current
CC
,
mA
C
See Figure 1
SN75146
DUAL DIFFERENTIAL LINE RECEIVER
SLLS015B – FEBRUARY 1986 – REVISED MAY 1995
electrical characteristics over recommended ranges of supply voltage, common-mode input
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP†MAXUNIT
‡
p
V
V
V
V
I
I
†
‡
§
NOTES: 3. The expanded threshold parameter is tested with a 500-Ω resistor in series with each input.
CC
All typical values are at VCC = 5 V, TA = 25°C.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels
only.
Only one output should be shorted at a time, and duration of the short circuit should not exceed one second.
4. ri is defined by ∆VI/∆II.
5. The input not under test is grounded.
IT+
– V
IT–
IT+
)70mV
§
IT–
See Note 3–0.4
V
= 3 V to 25 V or V
See Note 4
V
= 0 to 5.5 V,
See Note 5
VO = 0,VID = 0.2 V–40–75–100mA
= –3 V to –25 V,
VI = 10 V1.13.25
VI = –10 V–1.6 –3.25
–0.2
‡
0.2
0.4
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
t
PLH
t
PHL
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
PARAMETER MEASUREMENT INFORMATION
392 Ω
V
CC+
(see Note B)
CC+
Input
51 Ω
CL = 30 pF
(see Note A)
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr ≤ 5 ns, tf ≤ 5 ns, PRR ≤ 300 kHz,
duty cycle = 50%.
OutputV
3.92 kΩ
= 30 pF,
L
0.5 V
Input
–0.5 V
p
50%50%
t
PLH
1.5 V1.5 VOutput
VOLTAGE WAVEFORMS
100150300ns
100150300ns
t
PHL
V
OH
V
OL
Figure 1. Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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