SN74S1051
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
D
Designed to Reduce Reflection Noise
D
Repetitive Peak Forward Current to 200 mA
D
12-Bit Array Structure Suited for
Bus-Oriented Systems
D
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
This Schottky barrier diode bus-termination array
is designed to reduce reflection noise on memory
bus lines. This device consists of a 12-bit
high-speed Schottky diode array suitable for
clamping to V
and/or GND.
CC
The SN74S1051 is characterized for operation
from 0°C to 70°C.
schematic diagrams
D012D023D034D045D056D067D078D089D0912D1013D1114D12
D OR N PACKAGE
(TOP VIEW)
V
1
CC
D01
2
D02
3
D03
4
D04
5
D05
6
D06
7
GND
8
15
16
15
14
13
12
11
10
V
CC
D12
D1 1
D10
D09
D08
D07
GND
9
V
CC
1
V
CC
16
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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8
GND9GND
Copyright 1997, Texas Instruments Incorporated
1
SN74S1051
To V
VFStatic forward voltage
V
From GND
IRStatic reverse current
V
V
A
CtTotal capacitance
pF
IxInternal crosstalk current
mA
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Steady-state reverse voltage, V
Continuous forward current, I
Repetitive peak forward current
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R
: Any D terminal from GND or to VCC 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . .
F
Total through all GND or V
‡
, I
: Any D terminal from GND or VCC 200 mA. . . . . . . . . . . . . . . . . . . . .
FRM
Total through all GND or V
terminals 170 mA. . . . . . . . . . . . . . . . . . . . . . .
CC
terminals 1 A. . . . . . . . . . . . . . . . . . . .
CC
†
Continuous total power dissipation at (or below) 25°C free-air temperature (see Note 1) 625 mW. . . . . . . . . .
Operating free-air temperature range 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
These values apply for tw ≤ 100 µs, duty cycle ≤ 20%.
NOTE 1: For operation above 25°C free-air temperature, derate linearly at the rate of 5 m/W/°C.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
single-diode operation (see Note 2)
PARAMETER TEST CONDITIONS MIN TYP§MAX UNIT
CC
V
Peak forward voltage IF = 200 mA 1.45 V
FM
To V
CC
From GND
p
§
All typical values are at VCC = 5 V, TA = 25°C.
NOTE 2: T est conditions and limits apply separately to each of the diodes. The diodes not under test are open-circuited during the measurement
of these characteristics.
VR = 0 V, f = 1 MHz 8 16
VR = 2 V, f = 1 MHz 4 8
IF = 18 mA 0.85 1.05
IF = 50 mA 1.05 1.3
IF = 18 mA 0.75 0.95
IF = 50 mA 0.95 1.2
= 7
R
5
µ
5
p
multiple-diode operation
§
All typical values are at VCC = 5 V, TA = 25°C.
NOTE 3: Ix is measured under the following conditions with one diode static, all others switching:
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 and 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
Reverse recovery time IF = 10 mA, I
rr
2
PARAMETER TEST CONDITIONS MIN TYP§MAX UNIT
Total IF current = 1 A, See Note 3 0.8 2
Total IF current = 198 mA, See Note 3 0.02 0.2
Switching diodes: tw = 100 µs, duty cycle = 20%
Static diode: VR = 5 V
The static diode input current is the internal crosstalk current Ix.
RM(REC)
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
= 10 mA, I
= 1 mA, RL = 100 Ω 8 16 ns
R(REC)
SN74S1051
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
PARAMETER MEASUREMENT INFORMATION
50 Ω
(See Note A) (See Note B)
90%
Input Pulse
(See Note A)
10%
NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tr = 20 ns, ZO = 50 Ω, freq = 500 Hz,
duty cycle = 1%.
B. The output waveform is monitored by an oscilloscope having the following characteristics: tr ≤ 350 ps, Ri = 50 Ω, Ci ≤ 5 pF.
Pulse
Generator
t
r
DUT
450 Ω
Oscilloscope
Output
Waveform
(See Note B)
Sampling
V
FM
V
F
Figure 1. Forward Recovery Voltage
DUT
(See Note A)
t
f
10%
Input Pulse
(See Note A)
90%
NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tf = 0.5 ns, ZO = 50 Ω, tw ≥ 50 ns,
duty cycle = 1%.
B. The output waveform is monitored by an oscilloscope having the following characteristics: tr ≤ 350 ps, Ri = 50 Ω, Ci ≤ 5 pF.
Pulse
Generator
I
F
Output
Waveform
(See Note B)
Sampling
Oscilloscope
I
f
0
I
R(REC)
(See Note B)
t
rr
I
RM(REC)
Figure 2. Reverse Recovery Time
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3
SN74S1051
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
APPLICATION INFORMATION
Large negative transients occurring at the inputs of memory devices (DRAMs, SRAMs, EPROMs, etc.) or on the
CLOCK lines of many clocked devices can result in improper operation of the devices. The SN74S1051 diode
termination array helps suppress negative transients caused by transmission-line reflections, crosstalk, and
switching noise.
Diode terminations have several advantages when compared to resistor termination schemes. Split resistor or
Thevenin equivalent termination can cause a substantial increase in power consumption. The use of a single resistor
to ground to terminate a line usually results in degradation of the output high level, resulting in reduced noise immunity .
Series damping resistors placed on the outputs of the driver reduce negative transients, but they also can increase
propagation delays down the line, as a series resistor reduces the output drive capability of the driving device. Diode
terminations have none of these drawbacks.
The operation of the diode arrays in reducing negative transients is explained in the following figures. The diode
conducts current when the voltage reaches a negative value large enough for the diode to turn on. Suppression of
negative transients is tracked by the current-voltage characteristic curve for that diode. Typical
current-versus-voltage curves for the SN74S1051 are shown in Figures 3 and 4.
To illustrate how the diode arrays act to reduce negative transients at the end of a transmission line, the test setup
in Figure 5 was evaluated. The resulting waveforms with and without the diode are shown in Figure 6.
The maximum effectiveness of the diode arrays in suppressing negative transients occurs when the diode arrays are
placed at the end of a line and/or the end of a long stub branching off a main transmission line. The diodes also can
be used to reduce the negative transients that occur due to discontinuities in the middle of a line. An example of this
is a slot in a backplane that is provided for an add-on card.
DIODE FORWARD CURRENT
vs
DIODE FORWARD VOLTAGE
–100
TA = 25°C
–90
–80
–70
–60
–50
–40
– Forward Current – mA
–30
I
I
–20
–10
0
0 0.2 0.4 0.6 0.8 1 1.2
VI – Forward Voltage – V
1.4 1.6 1.8 2
Figure 3. Typical Input Current vs Input Voltage
(Lower Diode)
4
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SN74S1051
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
DIODE FORWARD CURRENT
vs
DIODE FORWARD VOLTAGE
100
TA = 25°C
90
80
70
60
50
40
– Forward Current – mA
30
I
I
20
10
0
0 0.2 0.4 0.6 0.8 1 1.2
VI – Forward Voltage – V
1.4 1.6 1.8 2
Figure 4. Typical Input Current vs Input Voltage
(Upper Diode)
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5
SN74S1051
12-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDLS018A – SEPTEMBER 1990 – REVISED AUGUST 1997
APPLICATION INFORMATION
ZO = 50 Ω
Length = 36 in.
Figure 5. Diode Test Setup
31.500 ns
End-of-
Line
Without
Diode
Ch 2 = 1.880 V/div
Timebase = 5.00 ns/V
Memory 1 = 1.880 V/div
Vmarker 1 = –1.353 V
Vmarker 2 = –3.647 V
56.500 ns 81.500 ns
End-of-Line With Diode
Vmarker 1
Vmarker 2
Offset = 0.000 V
Delay = 56.500 ns
Delta V = –2.293 V
Figure 6. Oscilloscope Display
6
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