SN54LVU04, SN74LVU04
HEX INVERTERS
SCLS185B – FEBRUARY 1993 – REVISED APRIL 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
EPIC
(Enhanced-Performance Implanted
CMOS) 2-µ Process
D
T ypical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
, TA = 25°C
D
T ypical V
OHV
(Output VOH Undershoot)
> 2 V at VCC, TA = 25°C
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
D
Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Ceramic (J) 300-mil DIPs
description
These hex inverters are designed for 2.7-V to
5.5-V VCC operation.
The ’LVU04 contain six independent inverters with
unbuffered outputs. These devices perform the
Boolean function Y = A.
The SN74LVU04 is available in TI’s shrink
small-outline package (DB), which provides the
same I/O pin count and functionality of standard
small-outline packages in less than half the
printed-circuit-board area.
The SN54L VU04 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74LVU04 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H L
L H
Copyright 1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
V
CC
6A
6Y
5A
5Y
4A
4Y
SN54LVU04...J OR W PACKAGE
SN74LVU04. . .D, DB, OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
1Y1ANC
4Y
4A
V
6A
3Y
GND
NC
SN54LVU04. . .FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54LVU04, SN74LVU04
HEX INVERTERS
SCLS185B – FEBRUARY 1993 – REVISED APRIL 1996
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
logic diagram, each inverter (positive logic)
YA
1
1A
1Y
2
3
2A 2Y
4
5
3A 3Y
6
9
4A 4Y
8
11
5A 5Y
10
13
6A 6Y
12
1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, DB, J, PW and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 3):D package 1.25 W. . . . . . . . . . . . . . . . . . .
DB or PW package 0.5 W. . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stressratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
recommended operating conditions (see Note 4)
SN54LVU04 SN74LVU04
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2.7 5.5 2.7 5.5 V
p
VCC = 2.7 V to 3.6 V 2.4 2.4
VIHHigh-level input voltage
VCC = 4.5 V to 5.5 V 3.55 3.55
V
p
VCC = 2.7 V to 3.6 V 0.5 0.5
VILLow-level input voltage
VCC = 4.5 V to 5.5 V 0.8 0.8
V
V
I
Input voltage 0 V
CC
0 V
CC
V
V
O
Output voltage 0 V
CC
0 V
CC
V
p
VCC = 2.7 V to 3.6 V –6 –6
IOHHigh-level output current
VCC = 4.5 V to 5.5 V –12 –12
mA
p
VCC = 2.7 V to 3.6 V 6 6
IOLLow-level output current
VCC = 4.5 V to 5.5 V 12 12
mA
∆t/∆v Input transition rise or fall rate 0 100 0 100 ns/V
T
A
Operating free-air temperature –55 125 –40 85 °C
NOTE 4: Unused inputs must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVU04, SN74LVU04
HEX INVERTERS
SCLS185B – FEBRUARY 1993 – REVISED APRIL 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVU04 SN74LVU04
PARAMETER
TEST CONDITIONS
V
CC
†
MIN TYP MAX MIN TYP MAX
UNIT
VI = V
IL,
IOH = –100 µA MIN to MAX VCC–0.5 VCC–0.5
V
OH
VI = GND, IOH = – 6 mA 3 V 2.4 2.4
V
VI = GND, IOH = – 12 mA 4.5 V 3.6 3.6
VI = V
IH,
IOL = 100 µA MIN to MAX 0.5 0.5
V
OL
VI = VCC, IOL = 6 mA 3 V 0.4 0.4
V
VI = VCC, IOL = 12 mA 4.5 V 0.55 0.55
3.6 V ±1 ±1
IIV
I
=
V
CC
or GND
5.5 V ±1 ±1
µ
A
3.6 V 20 20
ICCV
I
=
V
CC
or GND
,
I
O
=
0
5.5 V 20 20
µ
A
n
I
CC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
3 V to 3.6 V 500 500 µA
3.3 V 7 7
p
C
iVI
=
V
CC
or
GND
5 V 7.5 7.5
F
†
For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVU04
PARAMETER
FROM
TO
VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V
UNIT
(INPUT)
(OUTPUT)
MIN TYP MAX MIN TYP MAX MIN MAX
t
pd
A Y 5 10 8 13 13 ns
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN74LVU04
PARAMETER
FROM
TO
VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V
UNIT
(INPUT)
(OUTPUT)
MIN TYP MAX MIN TYP MAX MIN MAX
t
pd
A Y 5 10 8 13 13 ns
operating characteristics, T
A
= 25°C
PARAMETER
TEST CONDITIONS V
CC
TYP UNIT
p
p
p
p
p
3.3 V 7
p
C
pd
Power dissi ation ca acitance er inverter
C
L
= 50 F,f = 10
MHz
5 V 12
F
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVU04, SN74LVU04
HEX INVERTERS
SCLS185B – FEBRUARY 1993 – REVISED APRIL 1996
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
V
m
t
h
t
su
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
V
z
Open
GND
1 kΩ
1 kΩ
Data Input
Timing Input
V
m
V
i
0 V
V
m
V
m
V
i
0 V
V
i
0 V
V
m
V
m
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
m
V
m
V
i
0 V
V
m
V
m
Input
V
m
Output
Control
Output
Waveform 1
S1 at V
z
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
m
V
m
0.5 × V
z
0 V
V
m
VOL + 0.3 V
V
m
VOH – 0.3 V
[
0 V
V
i
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
V
z
GND
TEST S1
0.5 × V
CC
V
CC
2 × V
CC
1.5 V
2.7 V
6 V
WAVEFORM
CONDITION
VCC = 4.5 V
to 5.5 V
VCC = 2.7 V
to 3.6 V
V
m
V
i
V
z
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERSTOOD T O
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
Loading...