Texas Instruments SN74LVTH652DBLE, SN74LVTH652DBR, SN74LVTH652DGVR, SN74LVTH652DW, SN74LVTH652DWR Datasheet

SN54LVTH652, SN74LVTH652

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS

SCBS706D – AUGUST 1997 – REVISED APRIL 1999

D

State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation

D

I

and Power-Up 3-State Support Hot

off

Insertion

D

Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors

D

Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With

3.3-V V

D

Support Unregulated Battery Operation

CC

)

Down to 2.7 V

D

Typical V
< 0.8 V at V

D

Latch-Up Performance Exceeds 500 mA Per

(Output Ground Bounce)

OLP

= 3.3 V, TA = 25°C

CC

JESD 17

D

ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D

Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), Ceramic Flat
(W) Package, and Ceramic (JT) DIPs

description

These bus transceivers and registers are
designed specifically for low-voltage (3.3-V) V
operation, but with the capability to provide a TTL
interface to a 5-V system environment.

CC

SN54LVTH652.. . JT OR W PACKAGE

SN74LVTH652.. . DB, DGV, DW, OR PW PACKAGE

CLKAB

OEAB

SN54LVTH652.. . FK PACKAGE

A1
A2
A3

NC

A4
A5
A6

NC – No internal connection

SAB

A1
A2
A3
A4
A5
A6
A7
A8

GND

4

5
6
7
8
9
10
11

12

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10
11
12

(TOP VIEW)

SAB

CLKAB

OEAB

321

13 14

15 16 17 18

A8

A7

GND

24

V

23

CLKBA

22

SBA

21

OEBA

20

B1

19

B2

18

B3

17

B4

16

B5

15

B6

14

B7

13

B8

CC

NC

V

28 27 26

B8B7B6

NC

CC

CLKBA

SBA

25
24
23
22
21
20
19

OEBA
B1
B2
NC
B3
B4
B5

The ’LVTH652 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal storage registers.

Output-enable (OEAB and OEBA

) inputs are provided to control the transceiver functions. Select-control (SAB
and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for
select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between
real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the ’L VTH652 devices.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1999, T exas Instruments Incorporated

1

SN54LVTH652, SN74LVTH652

OPERATION OR FUNCTION

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS

SCBS706D – AUGUST 1997 – REVISED APRIL 1999

description (continued)

Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB
and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops
by simultaneously enabling OEAB and OEBA
when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

. In this configuration, each output reinforces its input; therefore,

When V
However, to ensure the high-impedance state above 1.5 V, OE

is between 0 and 1.5 V , the device is in the high-impedance state during power up or power down.

CC

should be tied to VCC through a pullup resistor
and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sinking/current-sourcing capability of the driver.

This device is fully specified for hot-insertion applications using I

and power-up 3-state. The I

off

circuitry

off

disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.

The SN54LVTH652 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH652 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

OEAB OEBA CLKAB CLKBA SAB SBA A1–A8 B1–B8

L H H or L H or L X X Input Input Isolation
L H ↑↑X X Input Input Store A and B data
X H ↑ H or L X X Input Unspecified

H H ↑↑X

L X H or L ↑ X X Unspecified
L L ↑↑XX
L L X X X L Output Input Real-time B data to A bus

L L X H or L X H Output Input Stored B data to A bus
H H X X L X Input Output Real-time A data to B bus
H H H or L X H X Input Output Stored A data to B bus

H L H or L H or L H H Output Output

†

The data-output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions always are
enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs.

‡

Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.

‡

X Input Output Store A in both registers

‡

DATA I/O

‡

Output Input Store B in both registers

†

‡

Input Hold A, store B

Store A, hold B

Stored A data to B bus and

stored B data to A bus

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54LVTH652, SN74LVTH652

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS

SCBS706D – AUGUST 1997 – REVISED APRIL 1999

BUS A

3 21 1 23 2 22 1 23 2 22321

OEAB

OEBA

LL

CLKABXCLKBAXSABXSBA

REAL-TIME TRANSFER

BUS B TO BUS A

BUS B

OEABOEBA

L

BUS A

HH

BUS B

CLKABXCLKBAXSABLSBA

X

REAL-TIME TRANSFER

BUS A TO BUS B

BUS A

3 21 23 2 22 3 21 1 2 22

OEAB

Pin numbers shown are for the DB, DGV, DW, JT, PW, and W packages.

OEBA

X
L
L

H
X
H

1

CLKAB CLKBAXSABXSBA

↑

XX

↑
↑↑

STORAGE FROM

A, B, OR A AND B

BUS B

X
X

X

X

Figure 1. Bus-Management Functions

BUS A

23

OEAB

OEBA

H L H or L H H

CLKAB CLKBA SAB SBA

H or L

TRANSFER STORED DA TA

TO A AND/OR B

BUS B

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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