SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Members of the Texas Instruments
Widebus
Family
D
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
D
Output Ports Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
D
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
D
Support Unregulated Battery Operation
Down to 2.7 V
D
T ypical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, TA = 25°C
D
I
off
and Power-Up 3-State Support Hot
Insertion
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
Flow-Through Architecture Optimizes PCB
Layout
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
These devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable
signals. For either 8-bit buffer section, the two output-enable (1OE1
and 1OE2 or 2OE1 and 2OE2) inputs must
be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit
buffer section are in the high-impedance state.
Copyright 1999, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
SN54LVTH162541. . . WD PACKAGE
SN74LVTH162541. . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y5
1Y6
GND
1Y7
1Y8
2Y1
2Y2
GND
2Y3
2Y4
V
CC
2Y5
2Y6
GND
2Y7
2Y8
2OE1
1OE2
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE2
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to
reduce overshoot and undershoot.
When V
CC
is between 0 and 1.5 V , the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE
should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54L VTH162541 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH162541 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OUTPUT
OE1
OE2 A
Y
L L L L
L LH H
HXX Z
XHX Z
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
25
47
1A1
1Y1
2
46
1A2
1Y2
3
44
1A3
1Y3
5
43
1A4
1Y4
6
41
1A5
1Y5
8
40
1A6
1Y6
9
38
1A7
1Y7
11
37
1A8
1Y8
12
36
2A1
2Y1
13
35
2A2
2Y2
14
33
2A3
2Y3
16
32
2A4
2Y4
17
30
2A5
2Y5
19
29
2A6
2Y6
20
27
2A7
2Y7
22
26
2A8
2Y8
23
24
48
1
1OE1
1OE2
2OE1
2OE2
&
&
EN1
EN2
111
2
logic diagram (positive logic)
1OE1
1OE2
2OE1
2OE2
1A1 1Y1
2Y1
2A1
To Seven Other Channels To Seven Other Channels
1
48
47
24
25
36
2
13
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance
or power-off state, V
O
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . .
Current into any output in the low state, I
O
30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the high state, I
O
(see Note 2) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
SN54LVTH162541 SN74LVTH162541
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2.7 3.6 2.7 3.6 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
V
I
Input voltage 5.5 5.5 V
I
OH
High-level output current –12 –12 mA
I
OL
Low-level output current 12 12 mA
∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V
∆t/∆V
CC
Power-up ramp rate 200 200 µs/V
T
A
Operating free-air temperature –55 125 –40 85 °C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVTH162541 SN74LVTH162541
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
V
IK
VCC = 2.7 V, II = –18 mA –1.2 –1.2 V
V
OH
VCC = 3 V, IOH = –12 mA 2 2 V
V
OL
VCC = 3 V, IOL = 12 mA 0.8 0.8 V
VCC = 0 or 3.6 V, VI = 5.5 V 10 10
Control inputs VCC = 3.6 V, VI = VCC or GND ±1 ±1
I
I
VI = V
CC
1 1
µ
A
D
ata inputs
V
CC
= 3.6
V
VI = 0 –5 –5
I
off
VCC = 0, VI or VO = 0 to 4.5 V ±100 µA
VI = 0.8 V 75 75
p
V
CC
= 3
V
VI = 2 V –75 –75
I
I(hold)
Data in uts
VCC = 3.6 V‡, VI = 0 to 3.6 V
500
–750
µA
I
OZH
VCC = 3.6 V, VO = 3 V 5 5 µA
I
OZL
VCC = 3.6 V, VO = 0.5 V –5 –5 µA
I
OZPU
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE
= don’t care
±100* ±100 µA
I
OZPD
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE
= don’t care
±100* ±100 µA
=
Outputs high 0.19 0.19
I
CC
V
CC
= 3.6 V,
IO = 0,
Outputs low 5 5
mA
VI = VCC or GND
Outputs disabled 0.19 0.19
∆I
CC
§
VCC = 3 V to 3.6 V, One input at VCC – 0.6 V,
Other inputs at VCC or GND
0.2 0.2 mA
C
i
VI = 3 V or 0 4 4 pF
C
o
VO = 3 V or 0 9 9 pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†
All typical values are at VCC = 3.3 V, TA = 25°C.
‡
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
§
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVTH162541 SN74LVTH162541
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
UNIT
MIN MAX MIN MAX MIN TYP†MAX MIN MAX
t
PLH
1.1 4.3 4.9 1.2 2.9 4.1 4.7
t
PHL
A
Y
1.1 4.3 4.9 1.2 2.4 4.1 4.7
ns
t
PZH
1.4 5.3 6.3 1.5 3.2 5 6.1
t
PZL
OE
Y
1.4 5.1 5.8 1.5 3.3 4.8 5.5
ns
t
PHZ
2.1 6.1 6.4 2.2 4.3 5.9 6.2
t
PLZ
OE
Y
2.1 5.7 5.9 2.2 4 5.4 5.5
ns
t
sk(o)
0.5 0.5 ns
†
All typical values are at VCC = 3.3 V, TA = 25°C.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVTH162541, SN74LVTH162541
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS690E – MAY 1997 – REVISED APRIL 1999
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t
h
t
su
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
Open
GND
500 Ω
500 Ω
Data Input
Timing Input
2.7 V
0 V
2.7 V
0 V
2.7 V
0 V
1.5 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
2.7 V
0 V
Input
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
VOL + 0.3 V
VOH – 0.3 V
≈ 0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
Open
6 V
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
6 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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