Datasheet SN74LVT244BDB, SN74LVT244BDBLE, SN74LVT244BDBR, SN74LVT244BDW, SN74LVT244BDWR Datasheet (Texas Instruments)

SN54LVT244B, SN74LVT244B

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

D

State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation

D

High-Impedance State During Power Up
and Power Down

D

Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)

D

Support Unregulated Battery Operation
Down to 2.7 V

D

Typical V
<0.8 V at V

D

I

off

and Power-Up 3-State Support Hot

(Output Ground Bounce)

OLP

= 3.3 V, TA = 25°C

CC

Insertion

D

Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II

D

ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

D

Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Packages, and Ceramic
(J) DIPs

description

SN54LVT244B...J OR W PACKAGE

SN74LVT244B. .. DB, DW, OR PW PACKAGE

SN54LVT244B. . . FK PACKAGE

1A2
2Y3
1A3
2Y2
1A4

(TOP VIEW)

1OE

1

1A1

2

2Y4

3

1A2

4

2Y3

5

1A3

6

2Y2

7

1A4

8
9

2Y1

GND

10

(TOP VIEW)

2Y4

3212019

4
5
6
7
8

910111213

2Y1

1A1

GND

20
19
18
17
16
15
14
13
12

11

1OE

V

2A1

CC

1Y4

V

CC

2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1

18
17
16
15
14

2A2 2OE

1Y1
2A4
1Y2
2A3
1Y3

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.

The ’L VT244B is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low ,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.

When VCC is between 0 and 1.5 V , the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I

and power-up 3-state. The I

off

disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.

The SN54LVT244B is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVT244B is characterized for operation from –40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.

Copyright  2000, Texas Instruments Incorporated

circuitry

off

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1

SN54LVT244B, SN74LVT244B

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

FUNCTION TABLE

(each 4-bit buffer)

INPUTS

OE A

L H H
L LL

H X Z

OUTPUT

Y

logic symbol

1OE 2OE

1A1
1A2
1A3
1A4

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

†

1

2
4
6
8

EN

18
16
14
12

1Y1
1Y2
1Y3
1Y4

2A1
2A2
2A3
2A4

logic diagram (positive logic)

1

1OE

218

1A1

416

1A2

1Y1

1Y2

2OE

2A1

2A2

19

11
13
15
17

19

11 9

13 7

EN

2Y1

2Y2

9

2Y1

7

2Y2

5

2Y3

3

2Y4

614

1A3

812

1A4

2

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1Y3

1Y4

15 5

2A3

17 3

2A4

2Y3

2Y4

UNIT

SN54LVT244B, SN74LVT244B

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high-impedance

or power-off state, V

Voltage range applied to any output in the high state, V

(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

(see Note 1) –0.5 V to V

O

CC

+ 0.5 V. . . . . . . . . . . . .

Current into any output in the low state, IO: SN54LVT244B 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74LVT244B 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current into any output in the high state, I

(see Note 2): SN54LVT244B 48 mA. . . . . . . . . . . . . . . . . . . . . . .

O

SN74LVT244B 64 mA. . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I
Output clamp current, I
Package thermal impedance, θ

(V

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OK

O

(see Note 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. This current flows only when the output is in the high state and VO > VCC.

3. The package thermal impedance is calculated in accordance with JESD 51.

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

recommended operating conditions (see Note 4)

SN54LVT244B SN74LVT244B

MIN MAX MIN MAX

V

CC

V

IH

V

IL

V

I

I

OH

I

OL

∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V
∆t/∆V

T

A

NOTE 4: All unused inputs of the device must at VCC or GND to ensure proper device operation. Refer to the TI application report,

Supply voltage 2.7 3.6 2.7 3.6 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
Input voltage 5.5 5.5 V
High-level output current –24 –32 mA
Low-level output current 48 64 mA

Power-up ramp rate 200 200 µs/V

CC

Operating free-air temperature –55 125 –40 85 °C

of Slow or Floating CMOS Inputs

, literature number SCBA004.

Implications

†

PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

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3

SN54LVT244B, SN74LVT244B

PARAMETER

TEST CONDITIONS

UNIT

V

V

V

V

V

2.7 V

V

V

V

V

I

A

Data inputs

V

V

V

CC

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54LVT244B SN74LVT244B

MIN TYP†MAX MIN TYP†MAX

V

IK

OH

OL

Control inputs VCC = 3.6 V, VI = VCC or GND ±1 ±1

I

p

I

off

I

OZH

I

OZL

I

OZPU

I

OZPD

I

CC

‡

∆I

CC

C

i

C

o

* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†

All typical values are at VCC = 3.3 V, TA = 25°C.

‡

This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

VCC = 2.7 V, II = –18 mA –1.2 –1.2 V
VCC = 2.7 V to 3.6 V, IOH = –100 µA VCC–0.2 VCC–0.2
VCC = 2.7 V, IOH = –8 mA 2.4 2.4

= 3

CC

=

CC

= 3

CC

VCC = 0 or 3.6 V, VI = 5.5 V 10 10

= 3.6

CC

VCC = 0, VI or VO = 0 to 4.5 V ±100 µA
VCC = 3.6 V, VO = 3 V 5 5 µA
VCC = 3.6 V, VO = 0.5 V –5 –5 µA
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,

OE

= don’t care

VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE

= don’t care

=

= 3.6 V,
IO = 0,
VI = VCC or GND

VCC = 3 V to 3.6 V, One input at VCC – 0.6 V,
Other inputs at VCC or GND

VI = 3 V or 0 4 4 pF
VO = 3 V or 0 7 7 pF

IOH = –24 mA 2
IOH = –32 mA 2
IOL = 100 µA 0.2 0.2
IOL = 24 mA 0.5 0.5
IOL = 16 mA 0.4 0.4
IOL = 32 mA 0.5 0.5
IOL = 48 mA 0.55
IOL = 64 mA 0.55

VI = V

CC

VI = 0 –5 –5

Outputs high 0.19 0.19
Outputs low 5 5
Outputs disabled 0.19 0.19

1 1

±100* ±100 µA

±100* ±100 µA

0.3 0.2 mA

µ

mA

PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

4

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A

Y

ns

OE

Y

ns

OE

Y

ns

SN54LVT244B, SN74LVT244B

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)

SN54LVT244B SN74LVT244B

PARAMETER

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

†

All typical values are at VCC = 3.3 V, TA = 25°C.

FROM

(INPUT)

TO

(OUTPUT)

VCC = 3.3 V

± 0.3 V

MIN MAX MIN MAX MIN TYP†MAX MIN MAX

1 3.6 3.9 1.1 2.3 3.5 3.8

1.2 3.4 3.6 1.3 2.1 3.3 3.6
1 4.6 5.5 1.1 2.5 4.5 5.3

1.3 4.5 5.1 1.4 2.7 4.4 4.9

1.8 4.5 4.7 1.9 2.8 4.4 4.5

1.7 4.5 4.6 1.8 2.9 4.4 4.4

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

SN54LVT244B, SN74LVT244B

3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000

PARAMETER MEASUREMENT INFORMATION

S1

1.5 V

1.5 V

1.5 V1.5 V

500 Ω

t

w

1.5 V

500 Ω

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

Input

Input

Output

Output

INVERTING AND NONINVERTING OUTPUTS

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.

1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V 1.5 V

t

PLH

t

PHL

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

t

PHL

t

PLH

6 V

Open

GND

2.7 V

0 V

V

OH

V

OL

V

OH

V

OL

2.7 V

0 V

Timing Input

Data Input

Output

Control

Output

Waveform 1

S1 at 6 V

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

t

su

1.5 V 1.5 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

t

PZL

1.5 V

t

PZH

1.5 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Open

GND

1.5 V

t

6 V

h

1.5 V1.5 V

t

VOL + 0.3 V

t

VOH – 0.3 V

PLZ

PHZ

2.7 V

0 V

2.7 V

0 V

2.7 V

0 V

3 V

V

OL

V

OH

≈ 0 V

Figure 1. Load Circuit and Voltage Waveforms

6

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IMPORTANT NOTICE

T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

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Copyright  2000, Texas Instruments Incorporated