Texas Instruments SN74LVCZ244ADBR, SN74LVCZ244ADGVR, SN74LVCZ244ADW, SN74LVCZ244ADWR, SN74LVCZ244AN Datasheet
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SN74LVCZ244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES274B – JUNE 1999 – REVISED JANUARY 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
T ypical V
OLP
(Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D
T ypical V
OHV
(Output VOH Undershoot) >2 V
at V
CC
= 3.3 V, TA = 25°C
D
I
off
and Power-Up 3-State Support Hot
Insertion
D
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
Package Options Include Shrink
Small-Outline (DB), Plastic Thin Very
Small-Outline (DGV), Small-Outline (DW),
and Thin Shrink Small-Outline (PW)
Packages
description
This octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation.
The SN74L VCZ244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
When VCC is between 0 and 1.5 V , the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN74LVCZ244A is characterized for operation from –40°C to 85°C.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
DB, DGV, DW, OR PW PACKAGE
(TOP VIEW)
SN74LVCZ244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES274B – JUNE 1999 – REVISED JANUARY 2000
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE A
Y
L H H
L LL
H X Z
logic symbol
†
2
1A1
4
1A2
6
1A3
8
1A4
EN
1
1Y1
18
1Y2
16
1Y3
14
1Y4
12
11
2A1
13
2A2
15
2A3
17
2A4
EN
19
2Y1
9
2Y2
7
2Y3
5
2Y4
3
1OE
2OE
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
218
1Y1
1OE
1A1
416
1Y2
1A2
614
1Y3
1A3
812
1Y4
1A4
19
11 9
2Y1
2OE
2A1
13 7
2Y2
2A2
15 5
2Y3
2A3
17 3
2Y4
2A4
SN74LVCZ244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES274B – JUNE 1999 – REVISED JANUARY 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, VCC –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 ) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
MIN MAX UNIT
V
CC
Supply voltage 2.7 3.6 V
V
IH
High-level input voltage VCC = 2.7 V to 3.6 V 2 V
V
IL
Low-level input voltage VCC = 2.7 V to 3.6 V 0.8 V
V
I
Input voltage 0 5.5 V
p
High or low state 0 V
CC
VOOutput voltage
3-state 0 5.5
V
p
VCC = 2.7 V –12
IOHHigh-level output current
VCC = 3 V –24
mA
p
VCC = 2.7 V 12
IOLLow-level output current
VCC = 3 V 24
mA
∆t/∆v Input transition rise or fall rate 6 ns/V
∆t/∆V
CC
Power-up ramp rate 150 µs/V
T
A
Operating free-air temperature –40 85 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
SN74LVCZ244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES274B – JUNE 1999 – REVISED JANUARY 2000
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS
V
CC
MIN TYP†MAX UNIT
IOH = –100 µA 2.7 V to 3.6 V VCC–0.2
2.7 V 2.2
V
OH
I
OH
= –
12 mA
3 V 2.4
V
IOH = –24 mA 3 V 2.2
IOL = 100 µA 2.7 V to 3.6 V 0.2
V
OL
IOL = 12 mA 2.7 V 0.4
V
IOL = 24 mA 3 V 0.55
I
I
VI = 0 to 5.5 V 3.6 V ±5 µA
I
off
VO = 0 to 5.5 V 0 ±5 µA
I
OZ
VO = 0 to 5.5 V 3.6 V ±5 µA
I
OZPU
VO = 0.5 V to 2.5 V, OE = don’t care 0 to 1.5 V ±5 µA
I
OZPD
VO = 0.5 V to 2.5 V, OE = don’t care 1.5 V to 0 ±5 µA
VI = VCC or GND
100
I
CC
3.6 V ≤ VI ≤ 5.5 V
‡
I
O
=
0
3.6 V
100
µ
A
∆I
CC
One input at VCC – 0.6 V, Other inputs at VCC or GND 2.7 V to 3.6 V 100 µA
C
i
VI = VCC or GND 3.3 V 3.5 pF
C
o
VO = VCC or GND 3.3 V 5.5 pF
†
All typical values are at VCC = 3.3 V, TA = 25°C.
‡
This applies in the disabled state only.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX
t
pd
A or B B or A 6.9 1.5 5.9 ns
t
en
OE
A or B 8.6 1.5 7.6 ns
t
dis
OE
A or B 6.8 1.5 6.5 ns
operating characteristics, T
A
= 25°C
TEST
VCC = 3.3 V
PARAMETER
CONDITIONS
TYP
UNIT
p
p
p
Outputs enabled
40
p
C
p
d
Power dissipation capacitance per buffer/driver
Outputs disabled
f
= 10 MHz
3
pF
SN74LVCZ244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES274B – JUNE 1999 – REVISED JANUARY 2000
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
V
CC
= 2.7 V AND 3.3 V " 0.3 V
V
OH
V
OL
t
h
t
su
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1
2 × V
CC
Open
GND
500 Ω
500 Ω
t
PLH
t
PHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t
PZL
t
PZH
t
PLZ
t
PHZ
VCC/2VCC/2
VCC/2 VCC/2
V
CC
0 V
VCC/2 VCC/2
V
OH
V
OL
0 V
VCC/2
VOL + 0.3 V
VCC/2
VOH – 0.3 V
0 V
VCC/2
V
CC
0 V
VCC/2 VCC/2
0 V
V
CC
0 V
VCC/2 VCC/2
t
w
Input
V
CC
V
CC
V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Output
Input
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
Open
2 × V
CC
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, trv
2 ns, tfv
2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 2000, Texas Instruments Incorporated
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