Texas Instruments SN74LVCR162245DL, SN74LVCR162245DLR Datasheet

SN74LVCR162245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES047 - AUGUST 1995
D
Widebus
D
EPIC
Family
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Typical V
(Output Ground Bounce)
OLP
< 0.8 V at VCC = 3.3 V, TA = 25°C
D
Typical V
(Output VOH Undershoot)
OHV
> 2 V at VCC = 3.3 V, TA = 25°C
D
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
D
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
D
All Outputs Have Equivalent 26-Series Resistors, So No External Resistors Are Required
D
Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
description
This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V V operation.
CC
DGG OR DL PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1DIR
1B1 1B2
GND
1B3 1B4
V
CC
1B5 1B6
GND
1B7 1B8 2B1 2B2
GND
2B3 2B4
V
CC
2B5 2B6
GND
2B7 2B8
2DIR
1OE 1A1 1A2 GND 1A3 1A4 V
CC
1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V
CC
2A5 2A6 GND 2A7 2A8 2OE
The SN74LVCR162245 is designed for asynchronous communication between data buses. The control function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
All outputs, which are designed to sink up to 12 mA, include 26-resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVCR162245 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are a trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1
SN74LVCR162245
OPERATION
16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCES047 - AUGUST 1995
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE DIR
L L B data to A bus L H A data to B bus
H X Isolation
logic symbol
48
1OE
2OE
1A1
1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1
2A2 2A3 2A4 2A5 2A6 2A7 2A8
1
25 24
47
46 44 43 41 40 38 37 36
35 33 32 30 29 27 26
1DIR
2DIR
G3 3 EN1 [BA]
3 EN2 [AB] G6 6 EN4 [BA]
6 EN5 [AB]
1
2
4
5
2
3 5 6 8
9 11 12 13
14 16 17 19 20 22 23
logic diagram (positive logic)
1
1DIR
47
1A1
1B1
1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1
2B2 2B3 2B4 2B5 2B6 2B7 2B8
2DIR
2A1
24
36
To Seven Other Channels
48
25
13
1OE
2
1B1
2OE
2B1
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
To Seven Other Channels
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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