TEXAS INSTRUMENTS SN74LVC827 Technical data
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SN74LVC827
10-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS306B – MARCH 1993 – REVISED JUL Y 1995
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Typical V
< 0.8 V at V
D
Typical V
(Output Ground Bounce)
OLP
= 3.3 V, TA = 25°C
CC
(Output VOH Undershoot)
OHV
> 2 V at VCC = 3.3 V, TA = 25°C
D
Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
DB, DW, OR PW PACKAGE
(TOP VIEW)
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
This 10-bit buffer/bus driver is designed for 2.7-V
to 3.6-V VCC operation.
The SN74LVC827 provides a high-performance bus interface for wide data paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1
input is high, all ten outputs are in the high-impedance state. The SN74L VC827 provides true data at its outputs.
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
or OE2)
The SN74LVC827 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE1 OE2 A
L L L L
L LH H
H XX Z
X H X Z
OUTPUT
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
SN74LVC827
10-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS306B – MARCH 1993 – REVISED JUL Y 1995
1
13
2
3
4
5
6
7
8
9
10
11
†
&
EN
1
23
22
21
20
19
18
17
16
15
14
logic diagram (positive logic)
1
OE1
13
OE2
2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A1 Y1
23
To Nine Other Channels
logic symbol
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
A9 Y9
A10 Y10
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
Input voltage range, VI (see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 ) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 3):DB package 0.65 W. . . . . . . . . . . . . . . . .
DW package 1.7 W. . . . . . . . . . . . . . . . .
PW package 0.7 W. . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the
Data Book
, literature number SCBD002B.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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