TEXAS INSTRUMENTS SN74LVC3G07 Technical data

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DCT OR DCU PACKAGE

(TOP VIEW)

1
2
3
4

8
7
6
5

1A
3Y
2A

GND

V

CC

1Y
3A
2Y

4
3
2
1

5
6
7
8

GND

2A
3Y
1A

2Y
3A
1Y
V

CC

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

查询SN74LVC3G07供应商

FEATURES

• Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

• Supports 5-V V

• Max tpdof 3.7 ns at 3.3 V

• Low Power Consumption, 10- µ A Max I

• ± 24-mA Output Drive at 3.3 V

• Input and Open-Drain Output Accepts

Voltages up to 5.5 V

• Typical V

at V

• Typical V

V

CC

• I

off

OLP

= 3.3 V, T

CC

OHV

= 3.3 V, T

Supports Partial-Power-Down Mode

Operation

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)

Operation

CC

(Output Ground Bounce) <0.8 V

= 25°C

A

(Output V

= 25°C

A

Undershoot) >2 V at

OH

SN74LVC3G07

TRIPLE BUFFER/DRIVER

WITH OPEN-DRAIN OUTPUTS

SCES365H – AUGUST 2001 – REVISED JUNE 2005

CC

DESCRIPTION/ORDERING INFORMATION

This triple buffer/driver is designed for 1.65-V to 5.5-V V
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

T

A

–40°C to 85°C

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

operation.

CC

ORDERING INFORMATION

PACKAGE

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)
NanoStar™ – WCSP (DSBGA)

0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT Reel of 3000 SN74LVC3G07DCTR C07_ _ _

VSSOP – DCU C07_

(1)

Reel of 3000 _ _ _CV_

Reel of 3000 SN74LVC3G07DCUR
Reel of 250 SN74LVC3G07DCUT

ORDERABLE PART NUMBER TOP-SIDE MARKING

SN74LVC3G07YEAR

SN74LVC3G07YZAR

SN74LVC3G07YEPR

SN74LVC3G07YZPR

(2)

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright © 2001–2005, Texas Instruments Incorporated

www.ti.com

1A 1Y

1 7

2A 2Y

3 5

3A 3Y

6 2

SN74LVC3G07
TRIPLE BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS

SCES365H – AUGUST 2001 – REVISED JUNE 2005

DESCRIPTION/ORDERING INFORMATION (CONTINUED)

The output of the SN74LVC3G07 is open drain and can be connected to other open-drain outputs to implement
active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

This device is fully specified for partial-power-down applications using I
preventing damaging current backflow through the device when it is powered down.

FUNCTION TABLE

(EACH BUFFER/DRIVER)

INPUT OUTPUT

A Y

H H
L L

LOGIC DIAGRAM (POSITIVE LOGIC)

. The I

off

circuitry disables the outputs,

off

Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

Supply voltage range –0.5 6.5 V

CC

V

Input voltage range

I

V

Voltage range applied to any output in the high-impedance or power-off state

O

V

Voltage range applied to any output in the high or low state

O

I

Input clamp current VI< 0 –50 mA

IK

I

Output clamp current VO< 0 –50 mA

OK

I

Continuous output current ±50 mA

O

Continuous current through V

θ

Package thermal impedance

JA

T

Storage temperature range –65 150 °C

stg

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of V
(4) The package thermal impedance is calculated in accordance with JESD 51-7.

(2)

or GND ±100 mA

CC

DCT package 220

(4)

is provided in the recommended operating conditions table.

CC

DCU package 227
YEA/YZA package 140
YEP/YZP package 102

–0.5 6.5 V

(2)

(2) (3)

–0.5 6.5 V
–0.5 6.5 V

°C/W

2

www.ti.com

Recommended Operating Conditions

V

V

V

V
V

I

Supply voltage V

CC

High-level input voltage V

IH

Low-level input voltage V

IL

Input voltage 0 5.5 V

I

Output voltage 0 5.5 V

O

Low-level output current 16 mA

OL

(1)

∆ t/ ∆ v Input transition rise or fall rate V

T

(1) All unused inputs of the device must be held at V

Operating free-air temperature –40 85 °C

A

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

CC

SN74LVC3G07

TRIPLE BUFFER/DRIVER

WITH OPEN-DRAIN OUTPUTS

SCES365H – AUGUST 2001 – REVISED JUNE 2005

MIN MAX UNIT

Operating 1.65 5.5
Data retention only 1.5
V

= 1.65 V to 1.95 V 0.65 × V

CC

V

= 2.3 V to 2.7 V 1.7

CC

V

= 3 V to 3.6 V 2

CC

V

= 4.5 V to 5.5 V 0.7 × V

CC

V

= 1.65 V to 1.95 V 0.35 × V

CC

V

= 2.3 V to 2.7 V 0.7

CC

V

= 3 V to 3.6 V 0.8

CC

V

= 4.5 V to 5.5 V 0.3 × V

CC

V

= 1.65 V 4

CC

V

= 2.3 V 8

CC

V

= 3 V

CC

V

= 4.5 V 32

CC

V

= 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20

CC

= 3.3 V ± 0.3 V 10 ns/V

CC

V

= 5 V ± 0.5 V 5

CC

CC

CC

CC

CC

24

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

IOL= 100 µ A 1.65 V to 5.5 V 0.1
IOL= 4 mA 1.65 V 0.45

V

OL

I

I

I

off

I

CC

∆ I

CC

C

i

A inputs VI= 5.5 V or GND 0 to 5.5 V ±5 µ A

(1) All typical values are at V

IOL= 8 mA 2.3 V 0.3
IOL= 16 mA 0.4
IOL= 24 mA 0.55
IOL= 32 mA 4.5 V 0.55

VIor VO= 5.5 V 0 ±10 µ A
VI= 5.5 V or GND, IO= 0 1.65 V to 5.5 V 10 µ A
One input at V
VI= V

CC

= 3.3 V, TA= 25°C.

CC

– 0.6 V, Other inputs at V

CC

or GND 3 V to 5.5 V 500 µ A

CC

or GND 3.3 V 3.5 pF

CC

MIN TYP

(1)

MAX UNIT

V

3 V

3

www.ti.com

SN74LVC3G07
TRIPLE BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS

SCES365H – AUGUST 2001 – REVISED JUNE 2005

Switching Characteristics

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )

V

= 1.8 V V

PARAMETER UNIT

t

pd

FROM TO

(INPUT) (OUTPUT)

A Y 1.5 7.8 1 4.3 1.1 3.7 1 2.9 ns

CC

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

MIN MAX MIN MAX MIN MAX MIN MAX

Operating Characteristics

TA= 25°C

V

= 1.8 V V

PARAMETER TEST CONDITIONS UNIT

C

Power dissipation capacitance f = 10 MHz 3 3 4 5 pF

pd

CC

TYP TYP TYP TYP

= 2.5 V V

CC

CC

= 2.5 V V

= 3.3 V V

CC

= 3.3 V V

CC

CC

CC

= 5 V

= 5 V

4

www.ti.com

V

M

t

h

t

su

From Output

Under Test

C

L

(see Note A)

LOAD CIRCUIT

S1

V

LOAD

Open

GND

R

L

R

L

Data Input

Timing Input

V

I

0 V

V

I

0 V

0 V

t

w

Input

VOLTAGE W AVEFORMS

SETUP AND HOLD TIMES

VOLTAGE W AVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE W AVEFORMS

PULSE DURATION

t

PLH

t

PHL

t

PHL

t

PLH

V

OH

V

OH

V

OL

V

OL

V

I

0 V

Input

Output
Waveform 1
S1 at V

LOAD

(see Note B)

Output
Waveform 2
S1 at V

LOAD

(see Note B)

V

OL

t

PZL

t

PZH

t

PLZ

t

PHZ

V

LOAD

/2

0 V

VOL + V

∆

V

LOAD/2

− V

∆

≈0 V

V

I

VOLTAGE W AVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Output

Output

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, t

PLZ

and t

PZL

are the same as t

pd

.

F. t

PZL

is measured at V

M

.

G. t

PLZ

is measured at V

OL

+ V∆.

H. All parameters and waveforms are not applicable to all devices.

Output

Control

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

I

V

M

V

M

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V
5 V ± 0.5 V

1 kΩ
500 Ω
500 Ω
500 Ω

V

CC

R

L

2 × V

CC

2 × V

CC

6 V

2 × V

CC

V

LOAD

C

L

30 pF
30 pF
50 pF
50 pF

0.15 V

0.15 V

0.3 V

0.3 V

V

∆

V

CC

V

CC

3 V

V

CC

V

I

VCC/2
VCC/2

1.5 V

VCC/2

V

M

tr/t

f

≤ 2 ns

≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns

INPUT

t

PZL

(see Notes E and F)

t

PLZ

(see Notes E and G)

t

PHZ/tPZH

V

LOAD

V

LOAD

V

LOAD

TEST S1

V

LOAD

/2

PARAMETER MEASUREMENT INFORMATION

SN74LVC3G07

TRIPLE BUFFER/DRIVER

WITH OPEN-DRAIN OUTPUTS

SCES365H – AUGUST 2001 – REVISED JUNE 2005

(OPEN DRAIN)

Figure 1. Load Circuit and Voltage Waveforms

5

PACKAGE OPTION ADDENDUM

www.ti.com

6-Jun-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

SN74LVC3G07DCTR ACTIVE SM8 DCT 8 3000 Pb-Free

SN74LVC3G07DCUR ACTIVE US8 DCU 8 3000 Pb-Free

SN74LVC3G07DCURE4 ACTIVE US8 DCU 8 3000 Pb-Free

SN74LVC3G07DCUT ACTIVE US8 DCU 8 250 Pb-Free

SN74LVC3G07DCUTE4 ACTIVE US8 DCU 8 250 Pb-Free

SN74LVC3G07YEAR ACTIVE WCSP YEA 8 3000 TBD SNPB Level-1-260C-UNLIM
SN74LVC3G07YEPR ACTIVE WCSP YEP 8 3000 TBD SNPB Level-1-260C-UNLIM
SN74LVC3G07YZAR ACTIVE WCSP YZA 8 3000 Pb-Free

SN74LVC3G07YZPR ACTIVE WCSP YZP 8 3000 Pb-Free

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-1-260C-UNLIM

SNAGCU Level-1-260C-UNLIM

SNAGCU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1

MECHANICAL DATA

MPDS049B – MA Y 1999 – REVISED OCT OBER 2002

DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE P ACKAGE

0,65

PIN 1
INDEX AREA

0,30

0,15

8

1

3,15
2,75

5

2,90
2,70

4

1,30 MAX

M

0,13

4,25
3,75

Seating Plane

0,15 NOM

0° – 8°

Gage Plane

0,25

0,60
0,20

0,10
0,00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.

0,10

4188781/C 09/02

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