TEXAS INSTRUMENTS SN74LVC2G66 Technical data

www.ti.com

DCT OR DCU PACKAGE

(TOP VIEW)

1 2 3 4

8 7 6 5

1A 1B 2C

GND

V

CC

1C 2B 2A

4 3 2 1

5 6 7 8

GND

2C 1B 1A

2A 2B 1C V

CC

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

查询SN74LVC2G66DCTR供应商

SN74LVC2G66

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

FEATURES

• Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

• 1.65-V to 5.5-V V

• Inputs Accept Voltages to 5.5 V

• Max tpdof 0.8 ns at 3.3 V

• High On-Off Output Voltage Ratio

• High Degree of Linearity

• High Speed, Typically 0.5 ns

(V

= 3 V, C

CC

L

• Rail-to-Rail Input/Output

• Low On-State Resistance, Typically ≈ 6 Ω

(V

= 4.5 V)

CC

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

DESCRIPTION/ORDERING INFORMATION

This dual bilateral analog switch is designed for 1.65-V to 5.5-V V The SN74LVC2G66 can handle both analog and digital signals. The device permits signals with amplitudes of up

to 5.5 V (peak) to be transmitted in either direction. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the

associated switch section. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for

analog-to-digital and digital-to-analog conversion systems.

Operation

CC

= 50 pF)

operation.

CC

T

A

NanoStar™ – WCSP (DSBGA)

0.17-mm Small Bump – YEA NanoFree™ – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free) NanoStar™ – WCSP (DSBGA)

–40°C to 85°C

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

0.23-mm Large Bump – YEP NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free) SSOP – DCT Reel of 3000 SN74LVC2G66DCTR C66_ _ _

VSSOP – DCU C66_

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

ORDERING INFORMATION

PACKAGE

(1)

Reel of 3000 _ _ _C6_

Reel of 3000 SN74LVC2G66DCUR Reel of 250 SN74LVC2G66DCUT

ORDERABLE PART NUMBER TOP-SIDE MARKING

SN74LVC2G66YEAR

SN74LVC2G66YZAR

SN74LVC2G66YEPR

SN74LVC2G66YZPR

(2)

www.ti.com

1B

1C

1A

1

7

2

One of Two Switches

SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

FUNCTION TABLE

(EACH SECTION)

CONTROL

INPUT SWITCH

(C)

L Off H On

LOGIC DIAGRAM, EACH SWITCH (POSITIVE LOGIC)

Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V

Supply voltage range

CC

V

Input voltage range

I

V

Switch I/O voltage range

O

I

Control input clamp current VI< 0 –50 mA

IK

I

I/O port diode current V

I/OK

I

On-state switch current V

T

Continuous current through V

θ

Package thermal impedance

JA

T

Storage temperature range –65 150 °C

stg

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to ground, unless otherwise specified. (3) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (4) This value is limited to 5.5 V maximum. (5) The package thermal impedance is calculated in accordance with JESD 51-7.

(2)

(2) (3)

(2) (3) (4)

< 0 or V

I/O

= 0 to V

I/O

or GND ±100 mA

CC

> V

I/O

CC

–0.5 6.5 V –0.5 6.5 V –0.5 V

CC

DCT package 220

(5)

DCU package 227 YEA/YZA package 140 YEP/YZP package 102

+ 0.5 V

–50 mA ±50 mA

°C/W

2

www.ti.com

SN74LVC2G66

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Recommended Operating Conditions

V V

V

∆ t/ ∆ v Input transition rise/fall time ns/V

T

(1) All unused inputs of the device must be held at V

Supply voltage 1.65 5.5 V

CC

I/O port voltage 0 V

I/O

High-level input voltage, control input V

IH

Low-level input voltage, control input V

IL

Control input voltage 0 5.5 V

I

Operating free-air temperature –40 85 °C

A

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(1)

V

= 1.65 V to 1.95 V V

CC

V

= 2.3 V to 2.7 V V

CC

V

= 3 V to 3.6 V V

CC

V

= 4.5 V to 5.5 V V

CC

V

= 1.65 V to 1.95 V V

CC

V

= 2.3 V to 2.7 V V

CC

V

= 3 V to 3.6 V V

CC

V

= 4.5 V to 5.5 V V

CC

V

= 1.65 V to 1.95 V 20

CC

V

= 2.3 V to 2.7 V 20

CC

V

= 3 V to 3.6 V 10

CC

V

= 4.5 V to 5.5 V 10

CC

or GND to ensure proper device operation. Refer to the TI application report,

CC

× 0.65

CC

× 0.7

CC

× 0.7

CC

× 0.7

CC

MIN MAX UNIT

× 0.35

CC

× 0.3

CC

× 0.3

CC

× 0.3

CC

V

CC

3

www.ti.com

SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

r

∆ r

I

∆ I C C C

On-state switch resistance VC= V

on

Peak on-state resistance VC= V

on(p)

Difference of on-state resistance

on

between switches

Off-state switch leakage current VI= GND and VO= VCC, 5.5 V µ A

S(off)

On-state switch leakage current 5.5 V µ A

S(on)

Control input current VC= V

I

Supply current VC= V

CC

Supply-current change VC= V

CC

Control input capacitance 5 V 3.5 pF

ic

Switch input/output capacitance 5 V 6 pF

io(off)

Switch input/output capacitance 5 V 14 pF

io(on)

(1) TA= 25°C

VI= V (see Figure 1 and Figure 2 )

VI= V VC= V (see Figure 1 and Figure 2 )

VI= V VC= VIL(see Figure 3 )

VI= V (see Figure 4 )

or GND,

CC

IH

to GND,

CC

IH

to GND,

CC

IH

and VO= GND or ±1

CC

or GND, VC= VIH, VO= Open

CC

or GND 5.5 V µ A

CC

or GND 5.5 V µ A

CC

– 0.6 V 5.5 V 500 µ A

CC

MIN TYP

CC

(1)

MAX UNIT

IS= 4 mA 1.65 V 12.5 30 IS= 8 mA 2.3 V 9 20 IS= 24 mA 3 V 7.5 15 IS= 32 mA 4.5 V 6 10 IS= 4 mA 1.65 V 85 120 IS= 8 mA 2.3 V 22 30 IS= 24 mA 3 V 12 20 IS= 32 mA 4.5 V 7.5 15 IS= 4 mA 1.65 V 7 IS= 8 mA 2.3 V 5 IS= 24 mA 3 V 3 IS= 32 mA 4.5 V 2

±0.1

Ω

(1) (1)

Ω

(1)

±1

(1)

±1

(1)

10

(1)

1

Switching Characteristics

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 5 )

V

= 1.8 V V

PARAMETER UNIT

(1)

t

pd

(2)

t

en

(3)

t

dis

(1) t (2) t

(3) t

and t

PLH

switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).

and t

PZL

and t

PLZ

are the same as tpd. The propagation delay is the calculated RC time constant of the typical on-state resistance of the

PHL

are the same as ten.

PZH

are the same as t

PHZ

FROM TO

(INPUT) (OUTPUT)

A or B B or A 2 1.2 0.8 0.6 ns

C A or B 2.3 10 1.6 5.6 1.5 4.4 1.3 3.9 ns C A or B 2.5 10.5 1.2 6.9 2 7.2 1.1 6.3 ns

.

dis

CC

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

MIN MAX MIN MAX MIN MAX MIN MAX

4

= 2.5 V V

CC

= 3.3 V V

CC

= 5 V

www.ti.com

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Analog Switch Characteristics

TA= 25°C

PARAMETER TEST CONDITIONS V

Frequency response

(switch on)

Crosstalk

(between switches)

Crosstalk

(control input to signal output)

Feedthrough attenuation

(switch off)

Sine-wave distortion A or B B or A %

(1) Adjust finvoltage to obtain 0 dBm at input.

(1)

FROM TO

(INPUT) (OUTPUT)

CL= 50 pF, RL= 600 Ω , fin= sine wave (see Figure 6 )

A or B B or A MHz

CL= 5 pF, RL= 50 Ω , fin= sine wave (see Figure 6 )

CL= 50 pF, RL= 600 Ω , fin= 1 MHz (sine wave) (see Figure 7 )

A or B B or A dB

CL= 5 pF, RL= 50 Ω , fin= 1 MHz (sine wave) (see Figure 7 )

CL= 50 pF, RL= 600 Ω ,

C A or B fin= 1 MHz (square wave) mV

(see Figure 8 )

CL= 50 pF, RL= 600 Ω , fin= 1 MHz (sine wave) (see Figure 9 )

A or B B or A dB

CL= 5 pF, RL= 50 Ω , fin= 1 MHz (sine wave) (see Figure 9 )

CL= 50 pF, RL= 10 k Ω , fin= 1 kHz (sine wave) (see Figure 10 )

CL= 50 pF, RL= 10 k Ω , fin= 10 kHz (sine wave) (see Figure 10 )

CC

1.65 V 35

2.3 V 120 3 V 175

4.5 V 195

1.65 V >300

2.3 V >300 3 V >300

4.5 V >300

1.65 V –58

2.3 V –58 3 V –58

4.5 V –58

1.65 V –42

2.3 V –42 3 V –42

4.5 V –42

1.65 V 35

2.3 V 50 3 V 70

4.5 V 100

1.65 V –58

2.3 V –58 3 V –58

4.5 V –58

1.65 V –42

2.3 V –42 3 V –42

4.5 V –42

1.65 V 0.1

2.3 V 0.025 3 V 0.015

4.5 V 0.01

1.65 V 0.15

2.3 V 0.025 3 V 0.015

4.5 V 0.01

SN74LVC2G66

TYP UNIT

Operating Characteristics

TA= 25°C

V

= 1.8 V V

PARAMETER UNIT

C

Power dissipation capacitance f = 10 MHz 8 9 9.5 11 pF

pd

TEST

CONDITIONS

CC

TYP TYP TYP TYP

= 2.5 V V

CC

= 3.3 V V

CC

= 5 V

CC

5

www.ti.com

V

CC

VI = V

CC

or GND

V

O

r

on



V

I

 V

O

I

S



V

I

- V

O

GND(On)

V

B or A

C

A or B

V

CC

V

IH

V

C

I

S

100

10

1

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

VCC = 1.65 V

VCC = 2.3 V

VCC = 3.0 V

VCC = 4.5 V

VIN - V

r

on

- Ω

SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

PARAMETER MEASUREMENT INFORMATION

Figure 1. On-State Resistance Test Circuit

Figure 2. Typical ronas a Function of Input Voltage (V

) for VI= 0 to V

I

CC

6

www.ti.com

PARAMETER MEASUREMENT INFORMATION

Condition 1: V

I

= GND, VO = V

CC

Condition 2: VI = VCC, VO = GND

V

CC

V

I

V

O

GND(Off)

B or A

C

A or B

V

CC

V

IL

V

C

A

V

CC

V

O

GND(On)

B or A

C

A or B

V

CC

V

IH

V

C

A

VI = V

CC

or GND

VO = Open

Figure 3. Off-State Switch Leakage-Current Test Circuit

SN74LVC2G66

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Figure 4. On-State Leakage-Current Test Circuit

7

www.ti.com

V

M

t

h

t

su

From Output

Under Test

C

L

(see Note A)

LOAD CIRCUIT

S1

V

LOAD

Open

GND

R

L

R

L

Data Input

Timing Input

V

I

0 V

V

I

0 V

t

w

Input

VOLTAGE W AVEFORMS

SETUP AND HOLD TIMES

VOLTAGE W AVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE W AVEFORMS

PULSE DURATION

t

PLH

t

PHL

t

PHL

t

PLH

V

OH

V

OH

V

OL

V

OL

V

I

0 V

Input

Output Waveform 1 S1 at V

LOAD

(see Note B)

Output Waveform 2

S1 at GND

(see Note B)

V

OL

V

OH

t

PZL

t

PZH

t

PLZ

t

PHZ

V

LOAD

/2

0 V

VOL + V

∆

VOH − V

∆

≈0 V

V

I

VOLTAGE W AVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Output

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open

V

LOAD

GND

TEST S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. t

PLZ

and t

PHZ

are the same as t

dis

.

F. t

PZL

and t

PZH

are the same as ten.

G. t

PLH

and t

PHL

are the same as tpd.

H. All parameters and waveforms are not applicable to all devices.

Output

Control

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

I

V

M

V

M

1.8 V ± 0.15 V

2.5 V ± 0.2 V

3.3 V ± 0.3 V 5 V ± 0.5 V

1 kΩ 500 Ω 500 Ω 500 Ω

V

CC

R

L

2 × V

CC

2 × V

CC

2 × V

CC

2 × V

CC

V

LOAD

C

L

30 pF 30 pF 50 pF 50 pF

0.15 V

0.3 V

V

∆

V

CC

V

CC

V

CC

V

CC

V

I

VCC/2 VCC/2 VCC/2 VCC/2

V

M

tr/t

f

≤2 ns

≤2 ns ≤2.5 ns ≤2.5 ns

INPUTS

SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

PARAMETER MEASUREMENT INFORMATION

8

Figure 5. Load Circuit and Voltage Waveforms

www.ti.com

PARAMETER MEASUREMENT INFORMATION

V

CC

V

O

GND

B or A

C

A or B

V

CC

V

C

V

IH

R

L

C

L

50 Ω

0.1 µF

(On)

VCC/2

RL/CL: 600 Ω/50 pF RL/CL: 50 Ω/5 pF

f

in

V

CC

V

O1

1B or 1A

C

1A or 1B

V

CC

V

C

V

IH

C

L

50 pF

50 Ω

0.1 µF

(On)

VCC/2

20log10(VO2/VI1) or 20log10(VO1/VI2)

f

in

R

L

600 Ω

R

in

600 Ω

V

O2

GND

2B or 2A

C

2A or 2B

V

C

V

IL

R

in

600 Ω

(Off)

VCC/2

R

L

600 Ω

C

L

50 pF

Figure 6. Frequency Response (Switch On)

SN74LVC2G66

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Figure 7. Crosstalk (Between Switches)

9

www.ti.com

V

CC

V

O

GND

B or A

C

A or B

V

CC

V

C

L

50 pF

50 Ω

VCC/2

R

in

600 Ω

R

L

600 Ω

V

CC

V

O

GND

B or A

C

A or B

V

CC

V

C

V

IL

R

L

C

L

50 Ω

0.1 µF

(Off)

VCC/2

RL/CL: 600 Ω/50 pF RL/CL: 50 Ω/5 pF

f

in

R

L

VCC/2

SN74LVC2G66 DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

PARAMETER MEASUREMENT INFORMATION

Figure 8. Crosstalk (Control Input, Switch Output)

10

Figure 9. Feedthrough (Switch Off)

www.ti.com

PARAMETER MEASUREMENT INFORMATION

V

CC

V

O

GND

B or A

C

A or B

V

CC

V

C

V

IH

R

L

10 kΩ

C

L

50 pF

600 Ω

10 µF

(On)

VCC/2

VCC = 1.65 V , VI = 1.4 V

P-P

VCC = 2.3 V , V

I

= 2 V

P-P

VCC = 3 V , VI = 2.5 V

P-P

VCC = 4.5 V , VI = 4 V

P-P

f

in

10 µF

SN74LVC2G66

DUAL BILATERAL ANALOG SWITCH

SCES325H – JULY 2001 – REVISED JULY 2005

Figure 10. Sine-Wave Distortion

11

PACKAGE OPTION ADDENDUM

www.ti.com

11-Jul-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

SN74LVC2G66DCTR ACTIVE SM8 DCT 8 3000 Pb-Free

SN74LVC2G66DCTRE4 ACTIVE SM8 DCT 8 3000 Pb-Free

SN74LVC2G66DCUR ACTIVE US8 DCU 8 3000 Pb-Free

SN74LVC2G66DCURE4 ACTIVE US8 DCU 8 3000 Pb-Free

SN74LVC2G66DCUT ACTIVE US8 DCU 8 250 Pb-Free

SN74LVC2G66DCUTE4 ACTIVE US8 DCU 8 250 Pb-Free

SN74LVC2G66YEAR ACTIVE WCSP YEA 8 3000 TBD SNPB Level-1-260C-UNLIM SN74LVC2G66YEPR ACTIVE WCSP YEP 8 3000 TBD SNPB Level-1-260C-UNLIM SN74LVC2G66YZAR ACTIVE WCSP YZA 8 3000 Pb-Free

SN74LVC2G66YZPR ACTIVE WCSP YZP 8 3000 Pb-Free

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period isin effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may notbe available. OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

SNAGCU Level-1-260C-UNLIM

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

MECHANICAL DATA

MPDS049B – MA Y 1999 – REVISED OCT OBER 2002

DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE P ACKAGE

0,65

PIN 1 INDEX AREA

0,30

0,15

8

1

3,15 2,75

5

2,90 2,70

4

1,30 MAX

M

0,13

4,25 3,75

Seating Plane

0,15 NOM

0° – 8°

Gage Plane

0,25

0,60 0,20

0,10 0,00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion D. Falls within JEDEC MO-187 variation DA.

0,10

4188781/C 09/02

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty . Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.

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TEXAS INSTRUMENTS SN74LVC2G66 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual