TEXAS INSTRUMENTS SN74LVC2G08 Technical data

Reel of 3000

40 C to 85 C

VSSOP

DCU

C08

SN74LVC2G08

DUAL 2-INPUT POSITIVE-AND GATE

SCES198I – APRIL 1999 – REVISED FEBRUARY 2003

D

Available in the Texas Instruments
NanoStar and NanoFree Packages

D

Supports 5-V VCC Operation

D

Inputs Accept Voltages to 5.5 V

D

Max tpd of 4.7 ns at 3.3 V

D

Low Power Consumption, 10-µA Max I

D

±24-mA Output Drive at 3.3 V

D

Typical V
<0.8 V at V

D

Typical V
>2 V at V

D

I

off

Supports Partial-Power-Down Mode

(Output Ground Bounce)

OLP

= 3.3 V, TA = 25°C

CC

(Output VOH Undershoot)

OHV

= 3.3 V, TA = 25°C

CC

CC

YEA, YEP, YZA, OR YZP PACKAGE

Operation

D

Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II

D

ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)

description/ordering information

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

DCT OR DCU PACKAGE

(TOP VIEW)

1A

1

1B

2

2Y

3

GND

4

(BOTTOM VIEW)

GND

2Y
1B
1A

4
3
2
1

V

8

1Y

7

2B

6

2A

5

5

2A

6

2B

7

1Y

8

V

CC

CC

The SN74LVC2G08 performs the Boolean function

Y+A • BorY+A)B

in positive logic.

NanoStarand NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the
die as the package.

ORDERING INFORMA TION

T

A

NanoStar – WCSP (DSBGA)

0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)

0.17-mm Small Bump – YZA (Pb-free)
NanoStar – WCSP (DSBGA)

–

°

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.

‡

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site.

0.23-mm Large Bump – YEP

°

NanoFree – WCSP (DSBGA)

0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT Reel of 3000 SN74LVC2G08DCTR C08_ _ _

–

PACKAGE

†

Reel of 3000 SN74LVC2G08DCUR
Reel of 250 SN74LVC2G08DCUT

ORDERABLE

PART NUMBER

SN74LVC2G08YEAR

SN74LVC2G08YZAR

SN74LVC2G08YEPR

SN74LVC2G08YZPR

TOP-SIDE

MARKING

_ _ _CE_

_

‡

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  2003, Texas Instruments Incorporated

1

SN74LVC2G08
DUAL 2-INPUT POSITIVE-AND GATE

SCES198I – APRIL 1999 – REVISED FEBRUARY 2003

description/ordering information (continued)

This device is fully specified for partial-power-down applications using I

off

. The I

circuitry disables the outputs,

off

preventing damaging current backflow through the device when it is powered down.

FUNCTION TABLE

(each gate)

INPUTS

A B

H H H

L XL

X L L

OUTPUT

Y

logic diagram (positive logic)

1

1A
1B

2A
2B

2

5
6

7

1Y

3

2Y

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V
Input voltage range, V
Voltage range applied to any output in the high-impedance or power-off state, V

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high or low state, V

(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The value of VCC is provided in the recommended operating conditions table.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

–0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 1) –0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

O

O

(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OK

±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(see Note 3): DCT package 220°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

DCU package 227°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

YEA/YZA package 140°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

YEP/YZP package 102°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

†

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

VCCSupply voltage

V

VIHHigh-level input voltage

V

VILLow-level input voltage

V

V

3 V

V

3 V

SN74LVC2G08

DUAL 2-INPUT POSITIVE-AND GATE

SCES198I – APRIL 1999 – REVISED FEBRUARY 2003

recommended operating conditions (see Note 4)

MIN MAX UNIT

pp

p

p

V
V

I

OH

I

OL

∆t/∆v Input transition rise or fall rate

T

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Input voltage 0 5.5 V

I

Output voltage 0 V

O

High-level output current

Low-level output current

Operating free-air temperature –40 85 °C

A

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Operating 1.65 5.5
Data retention only 1.5
VCC = 1.65 V to 1.95 V 0.65 × V
VCC = 2.3 V to 2.7 V 1.7
VCC = 3 V to 3.6 V 2
VCC = 4.5 V to 5.5 V 0.7 × V
VCC = 1.65 V to 1.95 V 0.35 × V
VCC = 2.3 V to 2.7 V 0.7
VCC = 3 V to 3.6 V 0.8
VCC = 4.5 V to 5.5 V 0.3 × V

VCC = 1.65 V –4
VCC = 2.3 V –8

=

CC

VCC = 4.5 V –32
VCC = 1.65 V 4
VCC = 2.3 V 8

=

CC

VCC = 4.5 V 32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V 5

CC

CC

CC

–16
–24

16
24

10

CC

CC

V

mA

mA

ns/V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN74LVC2G08

V

V

3 V

V

V

3 V

(INPUT)

(OUTPUT)

PARAMETER

TEST CONDITIONS

UNIT

DUAL 2-INPUT POSITIVE-AND GATE

SCES198I – APRIL 1999 – REVISED FEBRUARY 2003

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

PARAMETER TEST CONDITIONS V

IOH = –100 mA 1.65 V to 5.5 V VCC–0.1
IOH = –4 mA 1.65 V 1.2

OH

OL

I

A or B inputs VI = 5.5 V or GND 0 to 5.5 V ±5

I

I

off

I

CC

∆I

CC

C

i

†

All typical values are at VCC = 3.3 V, TA = 25°C.

IOH = –8 mA 2.3 V 1.9
IOH = –16 mA

IOH = –24 mA
IOH = –32 mA

IOL = 100 mA 1.65 V to 5.5 V 0.1
IOL = 4 mA 1.65 V 0.45
IOL = 8 mA 2.3 V 0.3
IOL = 16 mA

IOL = 24 mA
IOL = 32 mA

VI or VO = 5.5 V 0 ±10
VI = 5.5 V or GND, IO = 0 1.65 V to 5.5 V 10
One input at VCC – 0.6 V, Other inputs at VCC or GND 3 V to 5.5 V 500
VI = VCC or GND 3.3 V 5 pF

CC

4.5 V 3.8

4.5 V 0.55

MIN TYP†MAX UNIT

2.4

2.3

0.4

0.55

m

A

m

A

m

A

m

A

switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)

PARAMETER

t

pd

FROM

A or B

operating characteristics, T

C

Power dissipation capacitance f = 10 MHz 17 17 17 20 pF

pd

= 25°C

A

TO

VCC = 1.8 V

± 0.15 V

MIN MAX MIN MAX MIN MAX MIN MAX

Y

2.6 9 1 5.1 1 4.7 1 3.8 ns

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V

VCC = 2.5 V

± 0.2 V

TYP TYP TYP TYP

VCC = 3.3 V

± 0.3 V

VCC = 5 V

± 0.5 V

UNIT

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265