Texas Instruments SN74LVC2952ADBLE, SN74LVC2952ADBR, SN74LVC2952ADGVR, SN74LVC2952ADW, SN74LVC2952ADWR Datasheet
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SN74LVC2952A
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS311F – JANUARY 1993 – REVISED JUNE 1998
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Typical V
< 0.8 V at V
D
Typical V
(Output Ground Bounce)
OLP
= 3.3 V, TA = 25°C
CC
(Output VOH Undershoot)
OHV
> 2 V at VCC = 3.3 V, TA = 25°C
D
Power Off Disables Outputs, Permitting
Live Insertion
D
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
D
ESD Protection Exceeds 2000 V Per
CC
)
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
DB, DW, OR PW PACKAGE
(TOP VIEW)
B8
1
B7
2
B6
3
B5
4
B4
5
B3
6
B2
7
B1
8
OEAB
CLKAB
CLKENAB
GND
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A8
A7
A6
A5
A4
A3
A2
A1
OEBA
CLKBA
CLKENBA
This octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC2952A consists of two 8-bit back-to-back registers that store data flowing in both directions
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition
of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB or CLKENBA) input is low.
Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVC2952A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1998, Texas Instruments Incorporated
1
SN74LVC2952A
OUTPUT
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS311F – JANUARY 1993 – REVISED JUNE 1998
logic symbol
FUNCTION TABLE
INPUTS
CLKENAB
H X L X B
X H or L L X B
L ↑ LL L
L ↑ LH H
X X H X Z
†
A-to-B data flow is shown; B-to-A data flow is similar,
but uses CLKENBA
‡
Level of B before the indicated steady-state input
conditions were established
CLKAB OEAB A
, CLKBA, and OEBA.
†
OUTPUT
B
‡
0
‡
0
§
A1
A2
A3
A4
A5
A6
A7
A8
15
13
14
11
10
16
17
18
19
20
21
22
23
EN3
G1
9
EN4
G2
1 C5
2 C6
3
1
5D
1
46D
8
B1
7
B2
6
B3
5
B4
4
B5
3
B6
2
B7
1
B8
OEBA
CLKENBA
CLKBA
OEAB
CLKENAB
CLKAB
§
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
SN74LVC2952A
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS311F – JANUARY 1993 – REVISED JUNE 1998
CLKENAB
CLKAB
OEAB
CLKENBA
CLKBA
OEBA
A1
11
10
9
13
14
15
16
C1
1D
8
B1
C1
1D
To Seven Other Channels
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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