Texas Instruments SN74LVC162244DGGR, SN74LVC162244DL, SN74LVC162244DLR Datasheet

SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Widebus
Family
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
D
T ypical V
OLP
(Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D
T ypical V
OHV
(Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
D
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
D
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
D
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
description
This 16-bit buffer/driver is designed for 2.7-V to
3.6-V VCC operation. The SN74L VC162244 is designed specifically to improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer . It provides true outputs and symmetrical active-low output-enable (OE) inputs. The outputs, which are designed to sink up to 12 mA, include 26-resistors to reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVC162244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
OE A
Y
L H H L LL H X Z
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DGG OR DL PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE
1Y1 1Y2
GND
1Y3 1Y4
V
CC
2Y1 2Y2
GND
2Y3 2Y4 3Y1 3Y2
GND
3Y3 3Y4
V
CC
4Y1 4Y2
GND
4Y3 4Y4
4OE
2OE 1A1 1A2 GND 1A3 1A4 V
CC
2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 V
CC
4A1 4A2 GND 4A3 4A4 3OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN74LVC162244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
logic diagram (positive logic)
47
1A1
46
1A2
44
1A3
43
1A4
1Y1
2
1Y2
3
1Y3
5
1Y4
6
41
2A1
40
2A2
38
2A3
37
2A4
2Y1
8
2Y2
9
2Y3
11
2Y4
12
36
3A1
35
3A2
33
3A3
32
3A4
3Y1
13
3Y2
14
3Y3
16
3Y4
17
30
4A1
29
4A2
27
4A3
26
4A4
4Y1
19
4Y2
20
4Y3
22
4Y4
23
EN1
1
EN4
24
1
2
4
1
1
1
1
1OE 2OE 3OE
4OE
EN2
48
EN3
25
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3
1OE
1
1A1
1A2
1A3
1A4
47
46
44
43
1Y1
1Y2
1Y3
1Y4
2
3
5
6
2OE
48
2A1
2A2
2A3
2A4
41
40
38
37
2Y1
2Y2
2Y3
2Y4
8
9
11
12
3OE
25
3A1
3A2
3A3
3A4
36
35
33
32
3Y1
3Y2
3Y3
3Y4
13
14
16
17
4OE
24
4A1
4A2
4A3
4A4
30
29
27
26
4Y1
4Y2
4Y3
4Y4
19
20
22
23
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at T
A
= 55°C (in still air) (see Note 3): DGG package 1 W. . . . . . . . . . . . . . . . . .
DL package 1.4 W. . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
Data Book
, literature number SCBD002B.
recommended operating conditions (see Note 4)
MIN MAX UNIT
V
CC
Supply voltage 2.7 3.6 V
V
IH
High-level input voltage VCC = 2.7 V to 3.6 V 2 V
V
IL
Low-level input voltage VCC = 2.7 V to 3.6 V 0.8 V
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
p
VCC = 2.7 V –8
IOHHigh-level output current
VCC = 3 V –12
mA
p
VCC = 2.7 V 8
IOLLow-level output current
VCC = 3 V 12
mA
t/∆V Input transition rise or fall rate 0 10 ns/V T
A
Operating free-air temperature –40 85 °C
NOTE 4: Unused control inputs must be held high or low to prevent them from floating.
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