www.ti.com
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1CLK
1K
1J
1PRE
1Q
1Q
2Q
GND
V
CC
1CLR
2CLR
2CLK
2K
2J
2PRE
2Q
D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
FEATURES
• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max tpdof 4.8 ns at 3.3 V
• Typical V
<0.8 V at V
• Typical V
>2 V at V
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This dual negative-edge-triggered J-K flip-flop is designed for 1.65-V to 3.6-V V
A low level at the preset ( PRE) or clear ( CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time
requirements is transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the J and K inputs can be changed without affecting the levels at the outputs. The SN74LVC112A can
perform as a toggle flip-flop by tying J and K high.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
OLP
CC
OHV
CC
(Output Ground Bounce)
= 3.3 V, T
(Output V
= 3.3 V, T
A
= 25 ° C
A
OH
= 25 ° C
Undershoot)
operation.
CC
T
A
–40 ° C to 85 ° C SSOP – DB Reel of 2000 SN74LVC112ADBR LC112A
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ORDERING INFORMATION
PACKAGE
SOIC – D Reel of 2500 SN74LVC112ADR LVC112A
SOP – NS Reel of 2000 SN74LVC112ANSR LVC112A
TSSOP – PW Reel of 2000 SN74LVC112APWR LC112A
TVSOP – DGV Reel of 2000 SN74LVC112ADGVR LC112A
(1)
Tube of 40 SN74LVC112AD
Reel of 250 SN74LVC112ADT
Tube of 90 SN74LVC112APW
Reel of 250 SN74LVC112APWT
ORDERABLE PART NUMBER TOP-SIDE MARKING
Copyright © 1993–2005, Texas Instruments Incorporated
www.ti.com
PRE
CLK
K
Q
Q
CLR
J
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
PRE CLR CLK J K Q Q
H L X X X L H
H H ↓ L L Q
H H ↓ H L H L
H H ↓ L H L H
H H ↓ H H Toggle
H H H X X Q
(1) The output levels in this configuration may not meet the minimum
LOGIC DIAGRAM, EACH FLIP-FLOP (POSITIVE LOGIC)
FUNCTION TABLE
INPUTS OUTPUTS
L H X X X H L
L L X X X H
levels for VOH. Furthermore, this configuration is nonstable; that is,
it does not persist when either PRE or CLR returns to its inactive
(high) level.
(1)
0
0
(1)
H
Q
0
Q
0
2
www.ti.com
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
V
CC
V
I
V
O
I
IK
I
OK
I
O
θ
JA
T
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of V
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Supply voltage range –0.5 6.5 V
Input voltage range
Output voltage range
Input clamp current VI< 0 –50 mA
Output clamp current VO< 0 –50 mA
Continuous output current ± 50 mA
Continuous current through V
Package thermal impedance
Storage temperature range –65 150 ° C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
is provided in the recommended operating conditions table.
CC
(1)
MIN MAX UNIT
(2)
(2) (3)
or GND ± 100 mA
CC
–0.5 6.5 V
–0.5 V
+ 0.5 V
CC
D package 73
DB package 82
(4)
DGV package 120 ° C/W
NS package 64
PW package 108
Recommended Operating Conditions
(1)
MIN MAX UNIT
V
V
V
V
V
I
OH
I
OL
Supply voltage V
CC
High-level input voltage V
IH
Low-level input voltage V
IL
Input voltage 0 5.5 V
I
Output voltage 0 V
O
High-level output current mA
Low-level output current mA
Operating 1.65 3.6
Data retention only 1.5
V
= 1.65 V to 1.95 V 0.65 × V
CC
= 2.3 V to 2.7 V 1.7 V
CC
V
= 2.7 V to 3.6 V 2
CC
V
= 1.65 V to 1.95 V 0.35 × V
CC
= 2.3 V to 2.7 V 0.7 V
CC
V
= 2.7 V to 3.6 V 0.8
CC
V
= 1.65 V –4
CC
V
= 2.3 V –8
CC
V
= 2.7 V –12
CC
V
= 3 V –24
CC
V
= 1.65 V 4
CC
V
= 2.3 V 8
CC
V
= 2.7 V 12
CC
V
= 3 V 24
CC
CC
∆ t/ ∆ v Input transition rise or fall rate 10 ns/V
T
(1) All unused inputs of the device must be held at V
Operating free-air temperature –40 85 ° C
A
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
CC
V
CC
3
www.ti.com
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
IOH= –100 µ A 1.65 V to 3.6 V V
IOH= –4 mA 1.65 V 1.2
V
OH
V
OL
I
I
I
CC
∆ I
CC
C
i
(1) All typical values are at V
IOH= –8 mA 2.3 V 1.7
IOH= –12 mA
IOH= –24 mA 3 V 2.2
IOL= 100 µ A 1.65 V to 3.6 V 0.2
IOL= 4 mA 1.65 V 0.45
IOL= 8 mA 2.3 V 0.7 V
IOL= 12 mA 2.7 V 0.4
IOL= 24 mA 3 V 0.55
VI= 5.5 V or GND 3.6 V ± 5 µ A
VI= V
One input at V
VI= V
or GND, IO= 0 3.6 V 10 µ A
CC
– 0.6 V, Other inputs at V
CC
or GND 3.3 V 4.5 pF
CC
= 3.3 V, TA= 25 ° C.
CC
or GND 2.7 V to 3.6 V 500 µ A
CC
CC
2.7 V 2.2
3 V 2.4
MIN TYP
– 0.2
CC
(1)
MAX UNIT
V
Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
V
f
clock
t
w
t
su
t
h
Clock frequency
Pulse duration, CLK high or low
Setup time ns
Hold time, data after CLK ↓
(1) This information was not available at the time of publication.
Data before CLK ↓
PRE or CLR inactive
= 1.8 V V
CC
± 0.15 V ± 0.2 V ± 0.3 V
MIN MAX MIN MAX MIN MAX MIN MAX
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
= 2.5 V V
CC
V
= 2.7 V
CC
3.3 3.3 ns
3.1 2.3
2.4 1.1
2.5 0.7 ns
= 3.3 V
CC
150 150 MHz
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
V
= 1.8 V V
PARAMETER UNIT
f
max
t
pd
FROM TO
(INPUT) (OUTPUT)
CLR or PRE
CLK
Q or Q ns
CC
± 0.15 V ± 0.2 V
MIN MAX MIN MAX MIN MAX MIN TYP MAX
(1) (1)
(1) (1) (1) (1)
(1) (1) (1) (1)
(1) This information was not available at the time of publication.
= 2.5 V
CC
V
CC
= 2.7 V V
= 3.3 V ± 0.3 V
CC
150 150 MHz
5.5 1 3.4 4.8
7.1 1 3.5 5.9
UNIT
Operating Characteristics
TA= 25 ° C
PARAMETER TEST CONDITIONS UNIT
C
(1) This information was not available at the time of publication.
4
Power dissipation capacitance f = 10 MHz
pd
V
= 1.8 V V
CC
= 2.5 V V
CC
TYP TYP TYP
(1) (1)
= 3.3 V
CC
24 pF
www.ti.com
V
M
t
h
t
su
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
S1
V
LOAD
Open
GND
R
L
R
L
Data Input
Timing Input
V
I
0 V
V
I
0 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
I
0 V
Input
Output
Waveform 1
S1 at V
LOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
LOAD
/2
0 V
VOL + V
∆
VOH − V
∆
≈0 V
V
I
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
V
LOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
M
V
I
V
M
V
M
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
V
CC
R
L
2 × V
CC
2 × V
CC
6 V
6 V
V
LOAD
C
L
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V
∆
V
CC
V
CC
2.7 V
2.7 V
V
I
VCC/2
VCC/2
1.5 V
1.5 V
V
M
tr/t
f
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
INPUTS
SN74LVC112A
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
WITH CLEAR AND PRESET
SCAS289L – JANUARY 1993 – REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
Figure 1. Load Circuit and Voltage Waveforms
5
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device Status
SN74LVC112AD ACTIVE SOIC D 16 40 Green (RoHS &
SN74LVC112ADBLE OBSOLETE SSOP DB 16 TBD Call TI Call TI
SN74LVC112ADBR ACTIVE SSOP DB 16 2000 Green (RoHS &
SN74LVC112ADBRE4 ACTIVE SSOP DB 16 2000 Green (RoHS &
SN74LVC112ADBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS &
SN74LVC112ADE4 ACTIVE SOIC D 16 40 Green (RoHS &
SN74LVC112ADG4 ACTIVE SOIC D 16 40 Green (RoHS &
SN74LVC112ADGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS &
SN74LVC112ADGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS &
SN74LVC112ADGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS &
SN74LVC112ADR ACTIVE SOIC D 16 2500 Green (RoHS &
SN74LVC112ADRE4 ACTIVE SOIC D 16 2500 Green (RoHS &
SN74LVC112ADRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
SN74LVC112ADT ACTIVE SOIC D 16 250 Green (RoHS &
SN74LVC112ADTE4 ACTIVE SOIC D 16 250 Green (RoHS &
SN74LVC112ADTG4 ACTIVE SOIC D 16 250 Green (RoHS &
SN74LVC112ANSR ACTIVE SO NS 16 2000 Green (RoHS &
SN74LVC112ANSRE4 ACTIVE SO NS 16 2000 Green (RoHS &
SN74LVC112ANSRG4 ACTIVE SO NS 16 2000 Green (RoHS &
SN74LVC112APW ACTIVE TSSOP PW 16 90 Green (RoHS &
SN74LVC112APWE4 ACTIVE TSSOP PW 16 90 Green (RoHS &
SN74LVC112APWG4 ACTIVE TSSOP PW 16 90 Green (RoHS &
SN74LVC112APWLE OBSOLETE TSSOP PW 16 TBD Call TI Call TI
SN74LVC112APWR ACTIVE TSSOP PW 16 2000 Green (RoHS &
SN74LVC112APWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS &
SN74LVC112APWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
no Sb/Br)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
(3)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
4-Jun-2007
(3)
no Sb/Br)
SN74LVC112APWT ACTIVE TSSOP PW 16 250 Green (RoHS &
CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC112APWTE4 ACTIVE TSSOP PW 16 250 Green (RoHS &
CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC112APWTG4 ACTIVE TSSOP PW 16 250 Green (RoHS &
CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
19-Mar-2008
*All dimensions are nominal
Device Package
SN74LVC112ADBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74LVC112ADGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1
SN74LVC112ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN74LVC112ANSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74LVC112APWR TSSOP PW 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC112ADBR SSOP DB 16 2000 346.0 346.0 33.0
SN74LVC112ADGVR TVSOP DGV 16 2000 346.0 346.0 29.0
SN74LVC112ADR SOIC D 16 2500 333.2 345.9 28.6
SN74LVC112ANSR SO NS 16 2000 346.0 346.0 33.0
SN74LVC112APWR TSSOP PW 16 2000 346.0 346.0 29.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,65
28
1
2,00 MAX
0,38
0,22
15
14
A
0,05 MIN
0,15
5,60
5,00
M
8,20
7,40
Seating Plane
0,10
0,25
0,09
0°–ā8°
Gage Plane
0,25
0,95
0,55
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
14
6,50
6,50
5,905,90
2016
7,50
6,90
24
8,50
28
10,50
9,907,90
30
10,50
9,90
38
12,90
12,30
4040065 /E 12/01
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
1,20 MAX
14
0,30
0,19
8
4,50
4,30
PINS **
7
Seating Plane
0,15
0,05
8
1
A
DIM
14
0,10
6,60
6,20
M
0,10
0,15 NOM
0°–8°
2016
Gage Plane
24
0,25
0,75
0,50
28
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4040064/F 01/97
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
24
112
A
0,23
0,13
13
0,07
4,50
4,30
M
6,60
6,20
0,16 NOM
Gage Plane
0,25
0°–8°
0,75
0,50
1,20 MAX
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
0,15
0,05
14
3,70
3,50
Seating Plane
3,50
20
5,10
4,90
0,08
5,103,70
4,90
382416
7,90
7,70
48
9,80
9,60
56
11,40
11,20
4073251/E 08/00
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Products Applications
Amplifiers amplifier.ti.com Audio www.ti.com/audio
Data Converters dataconverter.ti.com Automotive www.ti.com/automotive
DSP dsp.ti.com Broadband www.ti.com/broadband
Clocks and Timers www.ti.com/clocks Digital Control www.ti.com/digitalcontrol
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Military www.ti.com/military
Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork
Microcontrollers microcontroller.ti.com Security www.ti.com/security
RFID www.ti-rfid.com Telephony www.ti.com/telephony
RF/IF and ZigBee® Solutions www.ti.com/lprf Video & Imaging www.ti.com/video
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