Texas Instruments SN74LV05AD, SN74LV05ADBR, SN74LV05ADGVR, SN74LV05ADR Datasheet

SN54LV05A, SN74LV05A
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
D
(Enhanced-Performance Implanted
CMOS) Process
D
Typical V < 0.8 V at V
D
Typical V > 2 V at V
D
Latch-Up Performance Exceeds 250 mA Per
(Output Ground Bounce)
OLP
= 3.3 V, TA = 25°C
CC
(Output VOH Undershoot)
OHV
= 3.3 V, TA = 25°C
CC
JESD 17
D
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
D
Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), and Thin Shrink Small-Outline (PW) Packages, Ceramic Flat (W) Packages, Chip Carriers (FK), and DIPs (J)
description
The ’LV05A devices contain six independent inverters designed for 2-V to 5.5-V V
These devices perform the Boolean function Y = A
.
The open-drain outputs require pullup resistors to perform correctly and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
CC
operation.
SN74LV05A. . . D, DB, DGV, NS, OR PW PACKAGE
SN54LV05A...J OR W PACKAGE
(TOP VIEW)
NC
14 13 12 11 10
9 8
CC
V
4Y
V 6A 6Y 5A 5Y 4A 4Y
6A
18 17 16 15 14
4A
CC
6Y NC 5A NC 5Y
1A
1
1Y
2
2A
3
2Y
4
3A
5 6
3Y
GND
SN54LV05A. . . FK PACKAGE
2A
NC
2Y
NC
3A
NC – No internal connection
7
(TOP VIEW)
1Y1ANC
3212019
4 5 6 7 8
910111213
3Y
GND
The SN54LV05A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74LV05A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
INPUT
OUTPUT
A
H L
L H
Y
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1
SN54LV05A, SN74LV05A HEX INVERTERS WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
10 12
2
1Y
4
2Y
6
3Y
8
4Y 5Y 6Y
1A 2A 3A 4A 5A 6A
1 3 5 9 11 13
1
logic diagram (positive logic)
YA
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V Input voltage range, V Output voltage range, V Input clamp current, I Output clamp current, I Continuous output current, I Continuous current through V Package thermal impedance, θ
CC
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(see Notes 1 and 2) –0.5 V to VCC+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(V
< 0) –20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
< 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OK
O
(V
= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
O
or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 3): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DB package 158°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 182°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 170°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
stg
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
UNIT
VIHHigh-level input voltage
V
VILLow-level input voltage
V
IOLLow-level output current
PARAMETER
TEST CONDITIONS
V
UNIT
V
V
SN54LV05A, SN74LV05A
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
recommended operating conditions (see Note 4)
SN54LV05A SN74LV05A
MIN MAX MIN MAX
V
V V
t/v Input transition rise or fall rate
T
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 2 5.5 2 5.5 V
CC
VCC = 2 V 1.5 1.5
p
p
Input voltage 0 5.5 0 5.5 V
I
Output voltage 0 V
O
p
Operating free-air temperature –55 125 –40 85 °C
A
Implications of Slow or Floating CMOS Inputs
VCC = 2.3 V to 2.7 V VCC× 0.7 VCC× 0.7 VCC = 3 V to 3.6 V VCC× 0.7 VCC× 0.7 VCC = 4.5 V to 5.5 V VCC× 0.7 VCC× 0.7 VCC = 2 V 0.5 0.5 VCC = 2.3 V to 2.7 V VCC× 0.3 VCC× 0.3 VCC = 3 V to 3.6 V VCC× 0.3 VCC× 0.3 VCC = 4.5 V to 5.5 V VCC× 0.3 VCC× 0.3
CC
VCC = 2 V 50 50 µA VCC = 2.3 V to 2.7 V 2 2 VCC = 3 V to 3.6 V 6 6 VCC = 4.5 V to 5.5 V 12 12 VCC = 2.3 V to 2.7 V 0 200 0 200 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 20 0 20
, literature number SCBA004.
0 100 0 100
0 V
CC
V
mA
ns/V
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54LV05A SN74LV05A
MIN TYP MAX MIN TYP MAX
I I I C
OL
I CC off
i
CC
IOL = 50 µA 2 V to 5.5 V 0.1 0.1 IOL = 2 mA 2.3 V 0.4 0.4 IOL = 6 mA 3 V 0.44 0.44 IOL = 12 mA 4.5 V 0.55 0.55 VI = VCC or GND 5.5 V ±1 ±1 µA VI = VCC or GND, IO = 0 5.5 V 20 20 µ A VI or VO = 0 to 5.5 V 0 V 5 5 µA VI = VCC or GND 3.3 V 2.5 2.5 pF
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
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3
SN54LV05A, SN74LV05A
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
CpdPower dissipation capacitance
C
pF
HEX INVERTERS WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
switching characteristics over recommended operating free-air temperature range,
= 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
V
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
= 15
L
= 50
L
p
p
switching characteristics over recommended operating free-air temperature range,
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
= 15
L
= 50
L
p
p
TA = 25°C SN54L V05A SN74LV05A
MIN TYP MAX MIN MAX MIN MAX
3.6 10.4 1 13 1 13
5.8 12.2 1 15 1 15
6.1 15.2 1 18 1 18
8.1 16.6 1 19.5 1 19.5
TA = 25°C SN54L V05A SN74LV05A
MIN TYP MAX MIN MAX MIN MAX
2.9 7.1 1 8.5 1 8.5 4 7.1 1 8.5 1 8.5
4.7 10.6 1 12 1 12
5.8 10.6 1 12 1 12
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
FROM TO LOAD
(INPUT) (OUTPUT) CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
NOTE 5: Characteristics are for surface-mount packages only.
Quiet output, maximum dynamic V Quiet output, minimum dynamic V Quiet output, minimum dynamic V High-level dynamic input voltage 2.31 V Low-level dynamic input voltage 0.97 V
= 3.3 V, CL = 50 pF, TA = 25°C (see Note 5)
CC
OL OL OH
= 15
L
= 50
L
p
p
TA = 25°C SN54L V05A SN74LV05A
MIN TYP MAX MIN MAX MIN MAX
2.2 5.5 1 6.5 1 6.5
2.9 5.5 1 6.5 1 6.5
3.4 7.5 1 8.5 1 8.5
4.2 7.5 1 8.5 1 8.5
SN74LV05A
MIN TYP MAX
0.55 0.8 V
–0.04 –0.8 V
3.12 V
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS V
p
p
p
= 50 pF,f = 10 MHz
L
CC
3.3 V 2.5 5 V 3
TYP UNIT
p
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
4
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From Output
Under Test
(see Note A)
SN54LV05A, SN74LV05A
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
V
Test Point
C
L
From Output
Under Test
(see Note A)
C
L
RL = 1 k
S1
CC
Open
GND
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open Drain
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
t
w
Input
Input
In-Phase
Output
Out-of-Phase
Output
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. t
F. t
G. t
50% V
CC
VOLTAGE WAVEFORMS
PULSE DURATION
50% V
CC
t
PLH
50% V
CC
t
PHL
50% V
CC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
PLZ PZL PHL
and t and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PLH
3-STATE AND OPEN-DRAIN OUTPUTS
50% V
50% V
dis
CC
t
PHL
50% V
t
PLH
50% V
.
LOAD CIRCUIT FOR
V
CC
CC
0 V
V
CC
0 V
V
OH
CC
V
OL
V
OH
CC
V
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Waveform 2
(see Note B)
CC
Output
S1 at GND
50% V
CC
t
CC
CC
h
50% V
50% V
CC
CC
VOL + 0.3 V
VOH – 0.3 V
t
su
50% V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
50% V
CC
t
PZL
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
t
PLZ
50% V
t
PHZ
50% V
V
CC
0 V
V
CC
0 V
V
CC
0 V
V
V
OL
V
OH
0 V
CC
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated
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