ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages,
Ceramic Flat (W) Packages, Chip Carriers
(FK), and DIPs (J)
description
The ’LV05A devices contain six independent
inverters designed for 2-V to 5.5-V V
These devices perform the Boolean function
Y = A
.
The open-drain outputs require pullup resistors to
perform correctly and can be connected to other
open-drain outputs to implement active-low
wired-OR or active-high wired-AND functions.
CC
operation.
SN74LV05A. . . D, DB, DGV, NS, OR PW PACKAGE
SN54LV05A...J OR W PACKAGE
(TOP VIEW)
NC
14
13
12
11
10
9
8
CC
V
4Y
V
6A
6Y
5A
5Y
4A
4Y
6A
18
17
16
15
14
4A
CC
6Y
NC
5A
NC
5Y
1A
1
1Y
2
2A
3
2Y
4
3A
5
6
3Y
GND
SN54LV05A. . . FK PACKAGE
2A
NC
2Y
NC
3A
NC – No internal connection
7
(TOP VIEW)
1Y1ANC
3212019
4
5
6
7
8
910111213
3Y
GND
The SN54LV05A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV05A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each inverter)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
INPUT
OUTPUT
A
HL
LH
Y
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54LV05A, SN74LV05A
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
†
10
12
2
1Y
4
2Y
6
3Y
8
4Y
5Y
6Y
1A
2A
3A
4A
5A
6A
1
3
5
9
11
13
1
logic diagram (positive logic)
YA
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Output voltage range, V
Input clamp current, I
Output clamp current, I
Continuous output current, I
Continuous current through V
Package thermal impedance, θ
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage25.525.5V
CC
VCC = 2 V1.51.5
p
p
Input voltage05.505.5V
I
Output voltage0V
O
p
Operating free-air temperature–55125–4085°C
A
Implications of Slow or Floating CMOS Inputs
VCC = 2.3 V to 2.7 VVCC× 0.7VCC× 0.7
VCC = 3 V to 3.6 VVCC× 0.7VCC× 0.7
VCC = 4.5 V to 5.5 VVCC× 0.7VCC× 0.7
VCC = 2 V0.50.5
VCC = 2.3 V to 2.7 VVCC× 0.3VCC× 0.3
VCC = 3 V to 3.6 VVCC× 0.3VCC× 0.3
VCC = 4.5 V to 5.5 VVCC× 0.3VCC× 0.3
CC
VCC = 2 V5050µA
VCC = 2.3 V to 2.7 V22
VCC = 3 V to 3.6 V66
VCC = 4.5 V to 5.5 V1212
VCC = 2.3 V to 2.7 V02000200
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V020020
, literature number SCBA004.
01000100
0V
CC
V
mA
ns/V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV05ASN74LV05A
MINTYPMAXMINTYPMAX
I
I
I
C
OL
I
CC
off
i
CC
IOL = 50 µA2 V to 5.5 V0.10.1
IOL = 2 mA2.3 V0.40.4
IOL = 6 mA3 V0.440.44
IOL = 12 mA4.5 V0.550.55
VI = VCC or GND5.5 V±1±1µA
VI = VCC or GND,IO = 05.5 V2020µ A
VI or VO = 0 to 5.5 V0 V55µA
VI = VCC or GND3.3 V2.52.5pF
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54LV05A, SN74LV05A
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
A
Y
C
pF
ns
A
Y
C
pF
ns
PARAMETER
UNIT
CpdPower dissipation capacitance
C
pF
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
switching characteristics over recommended operating free-air temperature range,
= 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
V
CC
FROMTOLOAD
(INPUT)(OUTPUT)CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
= 15
L
= 50
L
p
p
switching characteristics over recommended operating free-air temperature range,
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
FROMTOLOAD
(INPUT)(OUTPUT)CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
= 15
L
= 50
L
p
p
TA = 25°CSN54L V05ASN74LV05A
MINTYPMAXMINMAXMINMAX
3.610.4113113
5.812.2115115
6.115.2118118
8.116.6119.5119.5
TA = 25°CSN54L V05ASN74LV05A
MINTYPMAXMINMAXMINMAX
2.97.118.518.5
47.118.518.5
4.710.6112112
5.810.6112112
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
FROMTOLOAD
(INPUT)(OUTPUT)CAPACITANCE
t
*
PLZ
t
*
PZL
t
PLZ
t
PZL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
NOTE 5: Characteristics are for surface-mount packages only.
Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage2.31V
Low-level dynamic input voltage0.97V
= 3.3 V, CL = 50 pF, TA = 25°C (see Note 5)
CC
OL
OL
OH
= 15
L
= 50
L
p
p
TA = 25°CSN54L V05ASN74LV05A
MINTYPMAXMINMAXMINMAX
2.25.516.516.5
2.95.516.516.5
3.47.518.518.5
4.27.518.518.5
SN74LV05A
MINTYPMAX
0.550.8V
–0.04–0.8V
3.12V
operating characteristics, TA = 25°C
PARAMETERTEST CONDITIONSV
p
p
p
= 50 pF,f = 10 MHz
L
CC
3.3 V2.5
5 V3
TYPUNIT
p
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
From Output
Under Test
(see Note A)
SN54LV05A, SN74LV05A
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS391C – APRIL 1998 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
V
Test
Point
C
L
From Output
Under Test
(see Note A)
C
L
RL = 1 kΩ
S1
CC
Open
GND
TESTS1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open Drain
Open
V
CC
GND
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
t
w
Input
Input
In-Phase
Output
Out-of-Phase
Output
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. t
F. t
G. t
50% V
CC
VOLTAGE WAVEFORMS
PULSE DURATION
50% V
CC
t
PLH
50% V
CC
t
PHL
50% V
CC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
PLZ
PZL
PHL
and t
and t
and t
are the same as t
PHZ
are the same as ten.
PZH
are the same as tpd.
PLH
3-STATE AND OPEN-DRAIN OUTPUTS
50% V
50% V
dis
CC
t
PHL
50% V
t
PLH
50% V
.
LOAD CIRCUIT FOR
V
CC
CC
0 V
V
CC
0 V
V
OH
CC
V
OL
V
OH
CC
V
OL
Timing Input
Data Input
Output
Control
Output
Waveform 1
S1 at V
(see Note B)
Waveform 2
(see Note B)
CC
Output
S1 at GND
50% V
CC
t
CC
CC
h
50% V
50% V
CC
CC
VOL + 0.3 V
VOH – 0.3 V
t
su
50% V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
50% V
CC
t
PZL
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
t
PLZ
50% V
t
PHZ
50% V
V
CC
0 V
V
CC
0 V
V
CC
0 V
≈ V
V
OL
V
OH
≈ 0 V
CC
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.