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SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
SNx400, SNx4LS00, and SNx4S00 Quadruple 2-Input Positive-NAND Gates
1 Features
1
• Package Options Include:
– Plastic Small-Outline (D, NS, PS)
– Shrink Small-Outline (DB)
– Ceramic Flat (W)
– Ceramic Chip Carriers (FK)
– Standard Plastic (N)
– Ceramic (J)
• Also Available as Dual 2-Input Positive-NAND
Gate in Small-Outline (PS) Package
• Inputs Are TTL Compliant; VIH= 2 V and
VIL= 0.8 V
• Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
• SN5400, SN54LS00, and SN54S00 are
Characterized For Operation Over the Full Military
Temperature Range of –55ºC to 125ºC
2 Applications
• AV Receivers
• Portable Audio Docks
• Blu-Ray Players
• Home Theater
• MP3 Players or Recorders
• Personal Digital Assistants (PDAs)
3 Description
The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the
Boolean function Y = A .B or Y = A + B in positive
logic.
Device Information
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LS00DB SSOP (14) 6.20 mm × 5.30 mm
SN7400D,
SN74LS00D,
SN74S00D
SN74LS00NSR PDIP (14) 19.30 × 6.35 mm
SNJ5400J,
SNJ54LS00J,
SNJ54S00J
SNJ5400W,
SNJ54LS00W,
SNJ54S00W
SN54LS00FK,
SN54S00FK
SN7400NS,
SN74LS00NS,
SN74S00NS
SN7400PS,
SN74LS00PS
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SOIC (14) 8.65 mm × 3.91 mm
CDIP (14) 19.56 mm × 6.67 mm
CFP (14) 9.21 mm × 5.97 mm
LCCC (20) 8.89 mm × 8.89 mm
SO (14) 10.30 mm × 5.30 mm
SO (8) 6.20 mm × 5.30 mm
(1)
Logic Diagram, Each Gate (Positive Logic)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings: SN74LS00 .......................................... 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 6
6.5 Electrical Characteristics: SNx400............................ 6
6.6 Electrical Characteristics: SNx4LS00 ....................... 6
6.7 Electrical Characteristics: SNx4S00 ......................... 6
6.8 Switching Characteristics: SNx400 ........................... 7
6.9 Switching Characteristics: SNx4LS00....................... 7
6.10 Switching Characteristics: SNx4S00....................... 7
6.11 Typical Characteristics............................................ 8
7 Parameter Measurement Information .................. 9
7.1 Propagation Delays, Setup and Hold Times, and
Pulse Width................................................................ 9
8 Detailed Description............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 10
8.3 Feature Description................................................. 10
8.4 Device Functional Modes....................................... 10
9 Application and Implementation ........................ 11
9.1 Application Information............................................ 11
9.2 Typical Application .................................................. 11
10 Power Supply Recommendations ..................... 12
11 Layout................................................................... 13
11.1 Layout Guidelines ................................................. 13
11.2 Layout Example .................................................... 13
12 Device and Documentation Support ................. 14
12.1 Documentation Support ........................................ 14
12.2 Related Links ........................................................ 14
12.3 Receiving Notification of Documentation Updates 14
12.4 Community Resources.......................................... 14
12.5 Trademarks........................................................... 14
12.6 Electrostatic Discharge Caution............................ 14
12.7 Glossary................................................................ 14
13 Mechanical, Packaging, and Orderable
Information........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (November 2016) to Revision D Page
• Changed Typical Application Diagram see Application and Implementation section............................................................. 1
Changes from Revision B (October 2003) to Revision C Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
• Changed Ordering Information table to Device Comparison Table; see Package Option Addendum at the end of the
data sheet............................................................................................................................................................................... 1
• Changed Package thermal impedance, R
, values in Thermal Information table From: 86°C/W To: 90.9°C/W (D),
θJA
From: 96°C/W To: 102.8°C/W (DB), From: 80°C/W To: 54.8°C/W (N), and From: 76°C/W To: 89.7°C/W (NS)................... 6
2
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Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00
41Y
5NC
62A
7NC
82B
92Y
10
11NC123Y13
3A
14 3B
15 NC
16 4Y
17 NC
18 4A
19 4B
20 V
CC
1 NC
2 1A
3 1B
Not to scale
11A 8 V
CC
21B 7 2B
31Y 6 2A
4GND 5 2Y
Not to scale
11A 14 4Y
21B 13 4B
31Y 12 4A
4V
CC
11 GND
52Y 10 3B
62A 9 3A
72B 8 3Y
Not to scale
11A 14 V
CC
21B 13 4A
31Y 12 4B
42A 11 4Y
52B 10 3A
62Y 9 3B
7GND 8 3Y
Not to scale
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5 Pin Configuration and Functions
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
SN5400 J, SN54xx00 J and W, SN74x00 D, N, and NS, or
SN74LS00 D, DB, N, and NS Packages
14-Pin CDIP, CFP, SOIC, PDIP, SO, or SSOP
Top View
SN5400 W Package
14-Pin CFP
Top View
SN74xx00 PS Package
18-Pin SO
Top View
SN54xx00 FK Package
20-Pin LCCC
Top View
NAME
1A 1 1 1 2 I Gate 1 input
1B 2 2 2 3 I Gate 1 input
1Y 3 3 3 4 O Gate 1 output
2A 4 6 6 6 I Gate 2 input
2B 5 7 7 8 I Gate 2 input
2Y 6 5 5 9 O Gate 2 output
3A 10 — 9 13 I Gate 3 input
3B 9 — 10 14 I Gate 3 input
CDIP, CFP, SOIC,
PDIP, SO, SSOP
Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00
PIN
SO
(SN74xx00)
Pin Functions
CFP
(SN5400)
LCCC
I/O DESCRIPTION
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SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
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Pin Functions (continued)
PIN
NAME
CDIP, CFP, SOIC,
PDIP, SO, SSOP
SO
(SN74xx00)
CFP
(SN5400)
LCCC
I/O DESCRIPTION
3Y 8 — 8 12 O Gate 3 output
4A 13 — 12 18 I Gate 4 input
4B 12 — 13 19 I Gate 4 input
4Y 11 — 14 16 O Gate 4 output
GND 7 4 11 10 — Ground
NC — — —
V
CC
14 8 4 20 — Power supply
1, 5, 7,
11, 15, 17
— No connect
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage
Junction temperature, T
Storage temperature, T
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to network ground terminal.
CC
(2)
SNx400 and SNxS400 5.5
SNx4LS00 7
J
stg
(1)
MIN MAX UNIT
7 V
V
150 °C
–65 150 °C
6.2 ESD Ratings: SN74LS00
VALUE UNIT
V
(ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101
(1)
(2)
±500
±2000
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance. ESD
Tested on SN74LS00N package.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V
CC
V
IH
V
IL
I
OH
I
OL
Supply voltage
High-level input voltage 2 V
Low-level input voltage
High-level output current
Low-level output current
SN54xx00 4.5 5 5.5
SN74xx00 4.75 5 5.25
SNx400, SN7LS400, and SNx4S00 0.8
SN54LS00 0.7
SN5400, SN54LS00, and SN74LS00 –0.4
SNx4S00 –1
SNx400 16
SN5LS400 4
SN7LS400 8
SNx4S00 20
V
V
mA
mA
4
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Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
T
A
Operating free-air temperature
SN54xx00 –55 125
SN74xx00 0 70
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
MIN NOM MAX UNIT
°C
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SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
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6.4 Thermal Information
SN74LS00
THERMAL METRIC
(1)(2)
UNITD (SOIC) DB (SSOP) N (PDIP) NS (SO)
14 PINS 14 PINS 14 PINS 14 PINS
R
R
R
ψ
ψ
Junction-to-ambient thermal resistance 90.9 102.8 54.8 89.7 °C/W
θJA
Junction-to-case (top) thermal resistance 51.9 53.3 42.1 48.1 °C/W
θJC(top)
Junction-to-board thermal resistance 48 53.4 34.8 50.1 °C/W
θJB
Junction-to-top characterization parameter 18.6 16.5 26.9 16.7 °C/W
JT
Junction-to-board characterization parameter 47.8 52.9 34.7 49.8 °C/W
JB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
6.5 Electrical Characteristics: SNx400
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
V
V
I
I
I
IH
I
IL
I
OS
I
CCH
I
CCL
IK
OH
OL
VCC= MIN and II= –12 mA –1.5 V
VCC= MIN, VIL= 0.8 V, and IOH= –0.4 mA 2.4 3.4 V
VCC= MIN, VIH= 2 V, and IOL= 16 mA 0.2 0.4 V
VCC= MAX and VI= 5.5 V 1 mA
VCC= MAX and VI= 2.4 V 40 µA
VCC= MAX and VI= 0.4 V –1.6 mA
VCC= MAX
SN5400 –20 –55
SN7400 –18 –55
mA
VCC= MAX and VI= 0 V 4 8 mA
VCC= MAX and VI= 4.5 V 12 22 mA
6.6 Electrical Characteristics: SNx4LS00
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
V
V
I
I
I
IH
I
IL
I
OS
I
CCH
I
CCL
IK
OH
OL
VCC= MIN and II= –18 mA –1.5 V
VCC= MIN, VIL= MAX, and IOH= –0.4 mA 2.5 3.4 V
VCC= MIN and VIH= 2 V
IOL= 4 mA 0.25 0.4
IOL= 8 mA (SN74LS00) 0.35 0.5
VCC= MAX and VI= 7 V 0.1 mA
VCC= MAX and VI= 2.7 V 20 µA
VCC= MAX and VI= 0.4 V –0.4 mA
VCC= MAX –20 –100 mA
VCC= MAX and VI= 0 V 0.8 1.6 mA
VCC= MAX and VI= 4.5 V 2.4 4.4 mA
6.7 Electrical Characteristics: SNx4S00
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IK
V
OH
V
OL
I
I
I
IH
I
IL
VCC= MIN and II= –18 mA –1.2 V
VCC= MIN, VIL= 0.8 V, and IOH= –1 mA 2.5 3.4 V
VCC= MIN, VIH= 2 V, and IOL= 20 mA 0.5 V
VCC= MAX and VI= 5.5 V 1 mA
VCC= MAX and VI= 2.7 V 50 µA
VCC= MAX and VI= 0.5 V –2 mA
V
6
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SDLS025D –DECEMBER 1983–REVISED MAY 2017
Electrical Characteristics: SNx4S00 (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
OS
I
CCH
I
CCL
VCC= MAX –40 –100 mA
VCC= MAX and VI= 0 V 10 16 mA
VCC= MAX and VI= 4.5 V 20 36 mA
6.8 Switching Characteristics: SNx400
VCC= 5 V, TA= 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2.
PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
t
t
PLH
PHL
A or B Y RL= 400 Ω and CL= 15 pF
11 22
7 15
6.9 Switching Characteristics: SNx4LS00
VCC= 5 V, TA= 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2.
PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
t
t
PLH
PHL
A or B Y RL= 2 kΩ and CL= 15 pF
9 15
10 15
ns
ns
6.10 Switching Characteristics: SNx4S00
VCC= 5 V, TA= 25°C, and over operating free-air temperature range (unless otherwise noted). See Figure 2.
PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN TYP MAX UNIT
t
t
PLH
PHL
A or B Y
A or B Y
RL= 280 Ω and CL= 15 pF 3 4.5
RL= 280 Ω and CL= 50 pF 4.5
RL= 280 Ω and CL= 15 pF 3 5
RL= 280 Ω and CL= 50 pF 5
ns
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SDLS025D –DECEMBER 1983–REVISED MAY 2017
6.11 Typical Characteristics
CL= 15 pF
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Figure 1. T
(Across Devices)
PHL
8
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t
PHL
t
PLH
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V
CC
R
L
Test
Point
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
(see Note B
)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
1 kΩ
NOTES: A. CLincludes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for t
PLH
, t
PHL
, t
PHZ
, and t
PLZ
; S1 is open and S2 is closed for t
PZH
; S1 is closed and S2 is open for t
PZL
.
E. All input pulses are supplied by generators having the following characteristics: PRR≤ 1 MHz, ZO≈ 50 Ω; trand tf≤ 7 ns for Series
54/74 devices and trand tf≤ 2.5 ns for Series 54S/74S devices.
F. The outputs are measured one at a time with one input transition per measurement.
S1
S2
t
PHZ
t
PLZ
t
PZL
t
PZH
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D)
≈1.5 V
VOH− 0.5 V
VOL+ 0.5 V
≈1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
t
w
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
V
OH
V
OL
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SDLS025D –DECEMBER 1983–REVISED MAY 2017
7 Parameter Measurement Information
7.1 Propagation Delays, Setup and Hold Times, and Pulse Width
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
Product Folder Links: SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00
Figure 2. Load Circuits and Voltage Waveforms
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A
B
Y
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
SDLS025D –DECEMBER 1983–REVISED MAY 2017
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8 Detailed Description
8.1 Overview
The SNx4xx00 devices are quadruple, 2-input NAND gates which perform the Boolean function Y = A .B or Y =
A + B in positive logic.
8.2 Functional Block Diagram
8.3 Feature Description
The operating voltage of SN74xx00 is from 4.75-V to 5.25-V VCC. The operating voltage of SN54xx00 is from 4.5V to 5.5-V VCC. The SN54xx00 devices are rated from –55°C to 125°C whereas SN74xx00 device are rated from
0°C to 70°C.
8.4 Device Functional Modes
Table 1 lists the functions of the devices.
Table 1. Functional Table (Each Gate)
INPUTS OUTPUT
A B Y
H H L
L X H
X L H
10
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Error1
Error2
Error Flag
Sensor1
Sensor2
SN5400,SN54LS00,SN54S00
SN7400,SN74LS00,SN74S00
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SDLS025D –DECEMBER 1983–REVISED MAY 2017
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SNx4xx00 devices are quadruple, 2-input NAND gate. A typical application of NAND gate can be as an error
indicator as shown in Figure 3. If either of the sensor has an error, the error flag is high to indicate system error.
9.2 Typical Application
Figure 3. Typical Application Diagram
9.2.1 Design Requirements
These devices use BJT technology and have unbalanced output drive with IOLand IOHspecified as per the
Recommended Operating Conditions.
9.2.2 Detailed Design Procedure
• Recommended Input Conditions:
– The inputs are TTL compliant.
– Because the base-emitter junction at the inputs breaks down, no voltage greater than 5.5 V must be
applied to the inputs.
– Specified high and low levels: See VIHand VILin Recommended Operating Conditions.
• Recommended Output Conditions:
– No more than one output must be shorted at a time as per the Electrical Characteristics: SNx400 for
thermal stability and reliability.
– For high-current applications, consider thermal characteristics of the package listed in Thermal
Information.
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