Texas Instruments SN74HCT273DWR, SN74HCT273N, SN74HCT273PWLE, SN74HCT273PWR, SN74HCT273DBLE Datasheet
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SN54HCT273, SN74HCT273
OCTAL D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS068C – NOVEMBER 1988 – REVISED MA Y 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Inputs Are TTL-Voltage Compatible
D
Contain Eight D-Type Flip-Flops
D
Direct Clear Input
D
Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
D
Package Options Include Plastic
Small-Outline (DW) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These devices are positive-edge-triggered D-type
flip-flops with a common enable input. The
’HCT273 are similar to the ’HCT377, but feature
a common clear enable (CLR
) input instead of a
latched clock.
Information at the data (D) inputs meeting the
setup time requirements is transferred to the
Q outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a
particular voltage level and is not directly related
to the positive-going pulse. When CLK is at either
the high or low level, the D input has no effect at
the output. The circuits are designed to prevent
false clocking by transitions at CLR
.
The SN54HCT273 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74HCT273 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
CLR CLK D
Q
L X X L
H ↑ HH
H ↑ LL
H L X Q
0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
SN54HCT273 ...J OR W PACKAGE
SN74HCT273 ...DW, N, OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D1QCLR
5Q
5D
8Q
4Q
GND
CLK
V
CC
SN54HCT273 . . . FK PACKAGE
(TOP VIEW)
Copyright 1997, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
SN54HCT273, SN74HCT273
OCTAL D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS068C – NOVEMBER 1988 – REVISED MA Y 1997
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
1D
3
1D
11
CLK
C1
R
1
1Q
2
4
2D 2Q
5
7
3D
3Q
6
8
4D 4Q
9
13
5D 5Q
12
14
6D 6Q
15
17
7D 7Q
16
18
8D 8Q
19
CLR
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
CLK
1D
3
1D
C1
R
1Q
2
2D
4
1D
C1
R
2Q
5
3D
7
1D
C1
R
3Q
6
4D
8
1D
C1
R
4Q
9
5D
13
1D
C1
R
5Q
12
6D
14
1D
C1
R
6Q
15
7D
17
1D
C1
R
7Q
16
8D
18
1D
C1
R
8Q
19
CLR
11
1
logic diagram, each flip-flop (positive logic)
CLK(I)
R
Q
C
C
D
C
C
C
C
C
C
TG
TG
TG
TG
C
C
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