SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MA Y 1997
D
Operation From Very Slow Input
Transitions
D
T emperature-Compensated Threshold
Levels
D
High Noise Immunity
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK),
and Standard Plastic (N) and Ceramic
(J) 300-mil DIPs
description
In these devices, each circuit functions as a
quadruple NOR gate. They perform the Boolean
function Y = A • B or Y = A + B in positive logic.
However, because of the Schmitt action, the
inputs have different input threshold levels for
positive- and negative-going signals.
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean jitter-free output signals.
The SN54HC7002 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC7002 is characterized for
operation from –40°C to 85°C.
SN54HC7002 . . . J OR W PACKAGE
SN74HC7002 ...D OR N PACKAGE
SN54HC7002 . . . FK PACKAGE
1Y
NC
2A
NC
2B
NC – No internal connection
(TOP VIEW)
1A
1
1B
2
1Y
3
2A
4
2B
5
6
2Y
GND
7
(TOP VIEW)
1B1ANC
3212019
4
5
6
7
8
910111213
2Y
GND
NC
14
13
12
11
10
9
8
CC
V
3Y
V
4B
4A
4Y
3B
3A
3Y
4B
18
17
16
15
14
3A
CC
4A
NC
4Y
NC
3B
FUNCTION TABLE
(each gate)
INPUTS
A B
H X L
X HL
L L H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUT
Y
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
†
1
1A
1B
2A
2B
3A
3B
4A
4B
2
4
5
9
10
12
13
≥1
3
1Y
6
2Y
8
3Y
11
4Y
logic diagram (positive logic)
A
Y
B
absolute maximum ratings over operating free-air temperature range
‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
(VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
PARAMETER
TEST CONDITIONS
V
UNIT
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MA Y 1997
recommended operating conditions
SN54HC7002 SN74HC7002
MIN NOM MAX MIN NOM MAX
V
V
V
V
V
T
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
Supply voltage 2 5 6 2 5 6 V
CC
VCC = 2 V 1.5 1.5
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 V
I
Output voltage 0 V
O
Operating free-air temperature –55 125 –40 85 °C
A
IOH = –20 µA
V
OH
V
OL
V
T+
V
T–
VT+ – V
I
I
I
CC
C
i
T–
VI = VIH or V
VI = VIH or V
VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
VI = VCC or 0, IO = 0 6 V 2 40 20 µA
IL
IOH = –4 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = –5.2 mA 6 V 5.48 5.8 5.2 5.34
IOL = 20 µA
IL
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33
VCC = 4.5 V
VCC = 6 V 4.2 4.2
VCC = 2 V 0 0.5 0 0.5
VCC = 4.5 V
VCC = 6 V 0 1.8 0 1.8
CC
2 V 1.9 1.998 1.9 1.9
4.5 V 4.4 4.499 4.4 4.4
6 V 5.9 5.999 5.9 5.9
2 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1
2 V 0.7 1.2 1.5 0.7 1.5 0.7 1.5
4.5 V 1.55 2.5 3.15 1.55 3.15 1.55 3.15
6 V 2.1 3.3 4.2 2.1 4.2 2.1 4.2
2 V 0.3 0.6 1 0.3 1 0.3 1
4.5 V 0.9 1.6 2.45 0.9 2.45 0.9 2.45
6 V 1.2 2 3.2 1.2 3.2 1.2 3.2
2 V 0.2 0.6 1.2 0.2 1.2 0.2 1.2
4.5 V 0.4 0.9 2.1 0.4 2.1 0.4 2.1
6 V 0.5 1.3 2.5 0.5 2.5 0.5 2.5
2 V to 6 V 3 10 10 10 pF
3.15 3.15
0 1.35 0 1.35
CC
CC
TA = 25°C SN54HC7002 SN74HC7002
MIN TYP MAX MIN MAX MIN MAX
0 V
0 V
CC
CC
V
V
V
V
V
V
V
V
V
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54HC7002, SN74HC7002
PARAMETER
V
UNIT
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MA Y 1997
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
FROM TO
(INPUT) (OUTPUT)
t
pd
t
t
A or B Y
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
Power dissipation capacitance per gate No load 20 pF
pd
PARAMETER MEASUREMENT INFORMATION
Any
CC
2 V 60 130 195 163
4.5 V 18 26 39 33
6 V 14 22 33 28
2 V 28 75 110 95
4.5 V 8 15 22 19
6 V 6 13 19 16
TA = 25°C SN54HC7002 SN74HC7002
MIN TYP MAX MIN MAX MIN MAX
ns
ns
From Output
Under Test
LOAD CIRCUIT
Input
NOTES: A. CL includes probe and test-fixture capacitance.
90% 90%
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. t
PLH
and t
PHL
Test
Point
CL = 50 pF
(see Note A)
50%50%
are the same as tpd.
V
CC
10%10%
0 V
t
f
Figure 1. Load Circuit and Voltage Waveforms
Input
In-Phase
Output
Out-of-Phase
Output
V
50%
t
PLH
90% 90%
t
PHL
50% 50%
10% 10%
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
50%
t
PHL
50%50%
t
r
t
PLH
t
f
CC
0 V
V
OH
10%10%
V
OL
t
f
V
OH
90%90%
V
OL
t
r
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 1998, Texas Instruments Incorporated
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