Datasheet SN54HC688J, SN74HC688DW, SN74HC688DWR, SN74HC688N, SN74HC688PWLE Datasheet (Texas Instruments)
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OUTPUT
SN54HC688, SN74HC688
8-BIT IDENTITY COMPARATORS
SCLS010B – DECEMBER 1982 – REVISED MA Y 1997
D
Compare Two 8-Bit Words
D
Package Options Include Plastic
Small-Outline (DW) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These identity comparators perform comparisons
of two 8-bit binary or BCD words. An
output-enable (OE) input may be used to force the
output to the high level.
The SN54HC688 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC688 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
DATA
P, Q
P = Q L L
P > Q XH
P < Q XH
X H H
OE
P = Q
SN54HC688 ...J OR W PACKAGE
SN74HC688 . . . DW OR N PACKAGE
SN54HC688 . . . FK PACKAGE
P1
Q1
P2
Q2
P3
(TOP VIEW)
OE
1
P0
2
Q0
3
P1
4
Q1
5
P2
6
Q2
7
P3
8
Q3
9
GND
10
(TOP VIEW)
Q0
3212019
4
5
6
7
8
910111213
Q3
P0
20
19
18
17
16
15
14
13
12
11
OE
VCCP = Q
P4
Q4
V
CC
P = Q
Q7
P7
Q6
P6
Q5
P5
Q4
P4
18
17
16
15
14
P5
Q7
P7
Q6
P6
Q5
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC688, SN74HC688
8-BIT IDENTITY COMPARATORS
SCLS010B – DECEMBER 1982 – REVISED MA Y 1997
logic symbol
†
OE
P0
P1
P2
P3
P4
P5
P6
P7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
1
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
EN
0
7
0
7
COMP
P
Q
P = Q
19
P = Q
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
OE
2
P0
3
Q0
4
P1
5
Q1
6
P2
7
Q2
8
P3
9
Q3
11
P4
12
Q4
13
P5
14
Q5
15
P6
16
Q6
17
P7
18
Q7
19
P = Q
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
SN54HC688, SN74HC688
8-BIT IDENTITY COMPARATORS
SCLS010B – DECEMBER 1982 – REVISED MA Y 1997
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
†
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions
SN54HC688 SN74HC688
MIN NOM MAX MIN NOM MAX
V
V
V
V
V
t
t
T
Supply voltage 2 5 6 2 5 6 V
CC
VCC = 2 V 1.5 1.5
High-level input voltage
IH
Low-level input voltage
IL
Input voltage 0 V
I
Output voltage 0 V
O
Input transition (rise and fall) time
Operating free-air temperature –55 125 –40 85 °C
A
VCC = 4.5 V
VCC = 6 V 4.2 4.2
VCC = 2 V 0 0.5 0 0.5
VCC = 4.5 V
VCC = 6 V 0 1.8 0 1.8
VCC = 2 V 0 1000 0 1000
VCC = 4.5 V
VCC = 6 V 0 400 0 400
3.15 3.15
0 1.35 0 1.35
CC
CC
0 500 0 500
0 V
0 V
CC
CC
V
V
V
V
ns
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3
SN54HC688, SN74HC688
PARAMETER
TEST CONDITIONS
V
UNIT
PARAMETER
V
UNIT
t
ns
8-BIT IDENTITY COMPARATORS
SCLS010B – DECEMBER 1982 – REVISED MA Y 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C SN54HC688 SN74HC688
MIN TYP MAX MIN MAX MIN MAX
V
V
V
V
I
I
C
OH
OL
I
CC
CC
2 V 1.9 1.998 1.9 1.9
IOH = –20 µA
VI = VIH or V
VI = VIH or V
VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
VI = VCC or 0, IO = 0 6 V 8 160 80 µA
i
IL
IOH = –4 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = –5.2 mA 6 V 5.48 5.8 5.2 5.34
IOL = 20 µA
IL
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33
4.5 V 4.4 4.499 4.4 4.4
6 V 5.9 5.999 5.9 5.9
2 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1
2 V to 6 V 3 10 10 10 pF
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
FROM TO
(INPUT) (OUTPUT)
P or Q P = Q
pd
OE P = Q
t
t
Any
CC
2 V 113 210 313 265
4.5 V 30 42 63 53
6 V 24 36 53 45
2 V 66 120 179 151
4.5 V 16 24 36 30
6 V 14 20 30 26
2 V 38 75 110 95
4.5 V 8 15 22 19
6 V 6 13 19 16
TA = 25°C SN54HC688 SN74HC688
MIN TYP MAX MIN MAX MIN MAX
ns
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
Power dissipation capacitance No load 40 pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Input
From Output
Under Test
LOAD CIRCUIT
90% 90%
t
r
8-BIT IDENTITY COMPARATORS
SCLS010B – DECEMBER 1982 – REVISED MA Y 1997
PARAMETER MEASUREMENT INFORMATION
Test
Point
CL = 50 pF
(see Note A)
V
50%50%
CC
10%10%
0 V
t
f
Out-of-Phase
Input
In-Phase
Output
Output
50%
t
t
PLH
PHL
SN54HC688, SN74HC688
V
50%
t
PHL
90% 90%
t
r
t
PLH
50% 50%
10% 10%
t
f
50%50%
CC
0 V
V
OH
10%10%
V
OL
t
f
V
OH
90%90%
V
OL
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. t
PLH
and t
are the same as tpd.
PHL
Figure 1. Load Circuit and Voltage Waveforms
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
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5
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