Texas Instruments SN74HC563DW, SN74HC563DWR, SN74HC563N Datasheet

SN54HC563, SN74HC563
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS145B – DECEMBER 1982 – REVISED MA Y 1997
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
D
Bus-Structured Pinout
D
Package Options Include Plastic Small-Outline (DW) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
description
These 8-bit transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q
outputs follow the complements of the data (D) inputs. When LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs.
A buffered output-enable (OE
) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased high logic level provide the capability to drive bus lines without interface or pullup components.
OE
does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state. The SN54HC563 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74HC563 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE LE D
Q
L H H L L HL H L LX Q
0
H X X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
OE
1D 2D 3D 4D 5D 6D 7D 8D
GND
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE
SN54HC563 ...J OR W PACKAGE
SN74HC563 . . . DW OR N PACKAGE
(TOP VIEW)
3212019
910111213
4 5 6 7 8
18 17 16 15 14
2Q 3Q 4Q 5Q 6Q
3D 4D 5D 6D 7D
SN54HC563 . . . FK PACKAGE
(TOP VIEW)
2D
1D
OE
8Q
7Q 1Q
8D
GND
LE
V
CC
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN54HC563, SN74HC563 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SCLS145B – DECEMBER 1982 – REVISED MA Y 1997
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
C1
11
LE
19 18 17 16 15 14 13 12
7
6D
8
7D
9
8D
EN
1
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1 1D
absolute maximum ratings over operating free-air temperature range
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
SN54HC563, SN74HC563
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS145B – DECEMBER 1982 – REVISED MA Y 1997
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions
SN54HC563 SN74HC563
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 2 5 6 2 5 6 V
VCC = 2 V 1.5 1.5
V
IH
High-level input voltage
VCC = 4.5 V
3.15 3.15
V VCC = 6 V 4.2 4.2 VCC = 2 V 0 0.5 0 0.5
V
IL
Low-level input voltage
VCC = 4.5 V
0 1.35 0 1.35
V VCC = 6 V 0 1.8 0 1.8
V
I
Input voltage 0 V
CC
0 V
CC
V
V
O
Output voltage 0 V
CC
0 V
CC
V VCC = 2 V 0 1000 0 1000
t
t
Input transition (rise and fall) time
VCC = 4.5 V
0 500 0 500
ns
VCC = 6 V 0 400 0 400
T
A
Operating free-air temperature –55 125 –40 85 °C
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C SN54HC563 SN74HC563
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 1.998 1.9 1.9
IOH = –20 µA
4.5 V 4.4 4.499 4.4 4.4
V
OH
VI = VIH or V
IL
6 V 5.9 5.999 5.9 5.9
V
IOH = –6 mA 4.5 V 3.98 4.3 3.7 3.84 IOH = –7.8 mA 6 V 5.48 5.8 5.2 5.34
2 V 0.002 0.1 0.1 0.1
IOL = 20 µA
4.5 V 0.001 0.1 0.1 0.1
V
OL
VI = VIH or V
IL
6 V 0.001 0.1 0.1 0.1
V
IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33 IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33
I
I
VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
I
OZ
VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5 µA
I
CC
VI = VCC or 0, IO = 0 6 V 8 160 80 µA
C
i
2 V to 6 V 3 10 10 10 pF
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