Texas Instruments SN74HC4066PWR, SN74HC4066D, SN74HC4066DBLE, SN74HC4066DBR, SN74HC4066DR Datasheet

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SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325B – MARCH 1996 – REVISED MA Y 1997
D
High Degree of Linearity
D
D
Low Crosstalk Between Switches
D
Low On-State Impedance — Typically, 50 at VCC = 6 V
D
Individual Switch Controls
D
Extremely Low Input Current
D
Package Options Include Plastic Small-Outline (D), Plastic Shrink
D, DB, PW, OR N PACKAGE
(TOP VIEW)
1A 1B 2B 2A 2C 3C
GND
1 2 3 4 5 6 7
14 13 12 11 10
V
CC
1C 4C 4A 4B 3B
9
3A
8
Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic (N) 300-mil DIPs
description
The SN74HC4066 is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6 V (peak) to be transmitted in either direction.
Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
The SN74HC4066 is characterized for operation from –40_C to 85_C.
FUNCTION TABLE
(each switch)
INPUT
CONTROL
(C)
L OFF
H ON
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1C 1A 2C 2A 3C 3A 4C 4A
13 1 5 4 6 8 12 11
X1 1
SWITCH
1
10
2
1B
3
2B
9
3B
4B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325B – MARCH 1996 – REVISED MA Y 1997
logic diagram, each switch (positive logic)
C
One of Four Switches
A
V
V
CC
CC
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control-input diode current, II (V I/O port diode current, I On-state switch current (V
(VI < 0 or V
I
I/O
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
Storage temperature range, T
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to ground unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.
< 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
< VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O
= 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): D package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DB package 158°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 170°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
V
C
V
IH
(see Figure 1)
()
I
T
mA
CiInput capacitance
5 V
pF
SN74HC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS325B – MARCH 1996 – REVISED MA Y 1997
recommended operating conditions
MIN NOM MAX UNIT
V V
V
V
t
t
T
With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages.
Supply voltage 2
CC
I/O port voltage 0 V
I/O
VCC = 2 V 1.5 V
High-level input voltage, control inputs
IH
Low-level input voltage, control inputs
IL
Input rise/fall time
Operating free-air temperature –40 85 °C
A
VCC = 4.5 V VCC = 6 V 4.2 V VCC = 2 V 0 0.3 VCC = 4.5 V VCC = 6 V 0 1.2 VCC = 2 V 1000 VCC = 4.5 V VCC = 6 V 400
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
TA = 25_C
MIN TYP MAX
R
R
I
I
I
soff
I
son
I
CC
C C
CC
On-state switch resistance
on
Peak on resistance
on(p)
Control input current VC = 0 or V Off-state switch leakage current
On-state switch leakage current Supply current VI = 0 or VCC, IO = 0 6 V 2 20 µA
p
p
Feedthrough
f
capacitance Output capacitance A or B 5 V 9 pF
o
A or B C
A to B VI = 0 0.5 pF
IT = –1 mA, VI = 0 to VCC,
=
,
VI = VCC or GND, VC = VIH,
= –1
CC
VI = VCC or 0, VO = VCC or 0, VC = VIL, (see Figure 2)
VI = VCC or 0, VC = VIH, (see Figure 3)
2 V 150
4.5 V 50 85 106 6 V 30 2 V 320
4.5 V 70 170 215 6 V 50 6 V ±0.1 ±100 ±1000 nA
6 V ±0.1 ±5 µA
6 V ±0.1 ±5 µA
5 6 V
CC CC
3.15 V
0 0.9
9 3 10 10
CC CC
500
V
V
V
ns
p
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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