Texas Instruments JM38510-65708BFA, JM38510-65708BEA, SN54HC367J, SN74HC367D, SN74HC367DR Datasheet

SN54HC367, SN74HC367

HEX BUFFERS AND LINE DRIVERS

WITH 3-STATE OUTPUTS

SCLS309B – JANUARY 1996 – REVISED MA Y 1997

D

High-Current 3-State Outputs Drive Bus
Lines, Buffer Memory Address Registers,
or Drive up to 15 LSTTL Loads

D

True Outputs

D

Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs

description

These hex buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HC367 are organized as dual
4-line and 2-line buffers/drivers with active-low
output-enable (1OE
low, the device passes noninverted data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.

The SN54HC367 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC367 is characterized for
operation from –40°C to 85°C.

and 2OE) inputs. When OE is

SN54HC367 ...J OR W PACKAGE
SN74HC367 . . . D OR N PACKAGE

SN54HC367 . . . FK PACKAGE

1Y1
1A2

NC
1Y2
1A3

NC – No internal connection

(TOP VIEW)

1OE

1

1A1

2

1Y1

3

1A2

4
5

1Y2

6

1A3

7

1Y3

GND

8

(TOP VIEW)

1A1

3212019

4
5
6
7
8

910111213

1Y3

1OE

GND

NC

NC

16
15
14
13
12
11
10

9

CC

V

1Y4

V

CC

2OE
2A2
2Y2
2A1
2Y1
1A4
1Y4

2OE

18
17
16
15
14

1A4

2A2
2Y2
NC
2A1
2Y1

FUNCTION TABLE

(each buffer/driver)

INPUTS

OE A

H X Z

L HH
L L L

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

OUTPUT

Y

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1997, Texas Instruments Incorporated

1

SN54HC367, SN74HC367
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS

SCLS309B – JANUARY 1996 – REVISED MA Y 1997

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, N, and W packages.

†

1OE

1A1
1A2
1A3
1A4

2OE

2A1
2A2

1

2
4
6
10

15

12
14

EN

EN

logic diagram (positive logic)

1OE

1

2OE

15

11
13

3

1Y1

5

1Y2

7

1Y3

9

1Y4

2Y1
2Y2

23

1A1

To Three Other Channels

Pin numbers shown are for the D, J, N, and W packages.

1Y1

absolute maximum ratings over operating free-air temperature range

12 11

2A1

To One Other Channel

2Y1

‡

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

(VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 2): D package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JA

N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

PARAMETER

TEST CONDITIONS

V

UNIT

recommended operating conditions

V

V

V

V
V

t

t

T

Supply voltage 2 5 6 2 5 6 V

CC

High-level input voltage

IH

Low-level input voltage

IL

Input voltage 0 V

I

Output voltage 0 V

O

Input transition (rise and fall) time

Operating free-air temperature –55 125 –40 85 °C

A

SN54HC367, SN74HC367

HEX BUFFERS AND LINE DRIVERS

WITH 3-STATE OUTPUTS

SCLS309B – JANUARY 1996 – REVISED MA Y 1997

SN54HC367 SN74HC367

MIN NOM MAX MIN NOM MAX

VCC = 2 V 1.5 1.5
VCC = 4.5 V
VCC = 6 V 4.2 4.2
VCC = 2 V 0 0.5 0 0.5
VCC = 4.5 V
VCC = 6 V 0 1.8 0 1.8

VCC = 2 V 0 1000 0 1000
VCC = 4.5 V
VCC = 6 V 0 400 0 400

3.15 3.15

0 1.35 0 1.35

CC
CC

0 500 0 500

0 V
0 V

CC
CC

V

V

V
V

ns

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

TA = 25°C SN54HC367 SN74HC367

MIN TYP MAX MIN MAX MIN MAX

V

V

V

V

I
I
I
C

OH

OL

I
OZ
CC

i

CC

2 V 1.9 1.998 1.9 1.9

IOH = –20 µA

VI = VIH or V

VI = VIH or V

VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5 µA
VI = VCC or 0, IO = 0 6 V 8 160 80 µA

IL

IOH = –6 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = –7.8 mA 6 V 5.48 5.8 5.2 5.34

IOL = 20 µA

IL

IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33

4.5 V 4.4 4.499 4.4 4.4
6 V 5.9 5.999 5.9 5.9

2 V 0.002 0.1 0.1 0.1

4.5 V 0.001 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1

2 V to 6 V 3 10 10 10 pF

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN54HC367, SN74HC367

PARAMETER

V

UNIT

PARAMETER

V

UNIT

HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS

SCLS309B – JANUARY 1996 – REVISED MA Y 1997

switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)

FROM TO

(INPUT) (OUTPUT)

t

pd

t

en

t

dis

t

t

A Y

OE Y

OE Y

Any

CC

2 V 50 95 145 120

4.5 V 12 19 29 24
6 V 10 16 25 20
2 V 100 190 285 238

4.5 V 26 38 57 48
6 V 21 32 48 41
2 V 50 175 265 240

4.5 V 21 35 53 48
6 V 19 30 45 41
2 V 28 60 90 75

4.5 V 8 12 18 15
6 V 6 10 15 13

switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)

FROM TO

(INPUT) (OUTPUT)

t

pd

t

en

t

t

A Y

OE Y

Any

CC

2 V 70 120 180 150

4.5 V 17 24 36 30
6 V 14 20 31 25
2 V 140 230 345 285

4.5 V 30 46 69 57
6 V 28 39 59 48
2 V 45 210 315 265

4.5 V 17 42 63 53
6 V 13 36 53 45

TA = 25°C SN54HC367 SN74HC367

MIN TYP MAX MIN MAX MIN MAX

ns

ns

ns

ns

TA = 25°C SN54HC367 SN74HC367

MIN TYP MAX MIN MAX MIN MAX

ns

ns

ns

operating characteristics, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

C

4

Power dissipation capacitance per buffer/driver No load 35 pF

pd

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

50%

S1

S2

t

PHL

t

PLH

50%50%

10%10%

Test

From Output

Under Test

(see Note A)

Input

In-Phase

Output

Out-of-Phase

Output

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

Input

50%

INPUT RISE AND FALL TIMES

Point

C

L

LOAD CIRCUIT

t

PLH

t

PHL

VOLTAGE WAVEFORMS

90% 90%

t

r

VOLTAGE WAVEFORM

R

L

90% 90%

t

r

50% 50%

10% 10%

t

f

SN54HC367, SN74HC367

HEX BUFFERS AND LINE DRIVERS

WITH 3-STATE OUTPUTS

SCLS309B – JANUARY 1996 – REVISED MA Y 1997

V

CC

t

f

V

0 V

50%50%

CC

PARAMETER C

t

Output

Control

Output

Output

t
t

t

t

t

t

PZH

PZH
PZL
PHZ

PLZ

PZL

t

en

t

dis

tpd or t

V

CC

0 V

V

OH

10%10%

V

OL

t

f

V

90%90%

V

t

r

(Low-Level

OH

OL

Enabling)

Waveform 1

(See Note B)

Waveform 2

(See Note B)

ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS

R

L

1 kΩ

1 kΩ

50%

VOLTAGE WAVEFORMS

L

50 pF

or

150 pF

50 pF

50 pF

or

150 pF

≈ V

50%

50%

Closed Open

Closed Open

CC

S1

Open Closed

Open Closed

Open Open––

50%

t

PLZ

10%

90%

t

PHZ

S2

V

CC

0 V

≈ V

V

OL

V

OH

≈ 0 V

CC

NOTES: A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. t

F. t

G. t

PLH
PLZ
PZL

and t
and t
and t

are the same as tpd.

PHL

are the same as t

PHZ

are the same as ten.

PZH

dis

.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5

IMPORTANT NOTICE

T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright  1998, Texas Instruments Incorporated