SN54HC158, SN74HC158
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS296A – JANUARY 1996 – REVISED MA Y 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These monolithic data selectors/multiplexers
contain inverters and drivers to supply full data
selection to the four output gates. A separate
strobe (G
) input is provided. A 4-bit word is
selected from one of two sources and is routed to
the four outputs. The ’HC158 present inverted
data.
The SN54HC158 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC158 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
H X X X H
L L L XH
L L H XL
L H X LH
L H X H L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A/B
1A
1B
1Y
2A
2B
2Y
GND
V
CC
G
4A
4B
4Y
3A
3B
3Y
SN54HC158 ...J OR W PACKAGE
SN74HC158 . . . D OR N PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4A
4B
NC
4Y
3A
1B
1Y
NC
2A
2B
1A
A/B
NC
3Y
3B
V
G
2Y
GND
NC
SN54HC158 . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
SN54HC158, SN74HC158
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SCLS296A – JANUARY 1996 – REVISED MA Y 1997
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
2
1A
1
3
1B
5
2A
6
2B
11
3A
10
3B
14
4A
13
4B
EN
15
G1
1
MUX
1
1Y
4
2Y
7
3Y
9
4Y
12
G
A/B
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
Pin numbers shown are for the D, J, N, and W packages.
2
3
5
6
11
10
14
13
15
1
G
A/B
4B
4A
3B
3A
2B
2A
1B
1A
4
7
9
12
1Y
2Y
3Y
4Y