Texas Instruments SN74FB2041ARC Datasheet

D

Compatible With IEEE Std 1 194.1-1991
(BTL)

D

TTL A Port, Backplane Transceiver Logic
(BTL) B Port

D

Open-Collector B-Port Outputs Sink
100 mA

D

Isolated Logic-Ground and Bus-Ground
Pins Reduce Noise

D

BIAS VCC Pin Minimizes Signal Distortion
During Live Insertion or Withdrawal

D

D

D

D

RC PACKAGE

(TOP VIEW)

CC

SN74FB2041A

7-BIT TTL/BTL TRANSCEIVER

SCBS172I – NOVEMBER 1991 – REVISED SEPTEMBER 1999

High-Impedance State During Power Up
and Power Down

B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage

TTL Input Structures Incorporate Active
Clamping to Aid in Line Termination

Packaged in Plastic Quad Flatpack

GND

2AI1
2AI2

2AO2

GND

2AO3

GND

2AI3
3AI1

3AO1

GND

3AO2

GND

1AI1

GND

CC

1AO1

V

CC

3AO3

BG V

1OEA

BIAS V

3AI3

BG GND

OEB

2OEA

2AO1

52 51 50 49 48 47 46 45 44 43 42 41 40

1
2
3
4
5
6
7
8
9
10
11
12
13

14 15 16 17 18 19 20 21 22 23 24 25 26

3AI2

1OEB

TCK

TDI

TDO

V

V

CC

CC

TMS

GND

3OEA

2OEB

1B1

39
38
37
36
35
34
33
32
31
30
29
28
27

3OEB

GND
2B1
GND
2B2
GND
2B3
GND
3B1
GND
3B2
GND
3B3
GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1999, Texas Instruments Incorporated

1

SN74FB2041A

FUNCTION

Isolation

B d

7-BIT TTL/BTL TRANSCEIVER

SCBS172I – NOVEMBER 1991 – REVISED SEPTEMBER 1999

description

The SN74FB2041A device is a 7-bit transceiver designed to translate signals between TTL and backplane
transceiver logic (BTL) environments. It is specifically designed to be compatible with IEEE Std 1 194.1-1991.

The B port operates at BTL signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active
and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB
than 2.1 V , the B port is turned off. The enable/disable logic partitions the device as two 3-bit sections and one
1-bit section.

The A port operates at TTL signal levels and has split input and output pins. The A outputs reflect the inverse
of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less
than 2.1 V, the A outputs are in the high-impedance state.

Pins are allocated for the four-wire IEEE Std 1 149.1 (JT AG) test bus. TMS and TCK are not connected and TDI
is shorted to TDO.

BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
The SN74FB2041A is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

OEB OEB OEA

L X L
X HL
L X H

X HH
H L L AI data to B bus
H L H AI data to B bus, B data to AO bus

ata to AO bus

is high, or VCC is less

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN74FB2041A

7-BIT TTL/BTL TRANSCEIVER

SCBS172I – NOVEMBER 1991 – REVISED SEPTEMBER 1999

logic symbol

†

OEB

1OEA
1OEB

2OEA
2OEB

3OEA
3OEB

1AO1

1AI1

2AO1

2AI1

2AO2

2AI2

2AO3

2AI3

3AO1

3AI1

3AO2

3AI2

3AO3

3AI3

46
47

45
20

25
24

26

50
51
52
2
4
3
6

8
10

9
12
14

16
18

G1
EN2

1EN3
EN4

1EN5
EN6

1EN7

21

41

61

40

1B1

3

5

7

38

36

34

32

30

28

2B1

2B2

2B3

3B1

3B2

3B3

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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