
D
Compatible With IEEE Std 1 194.1-1991
(BTL)
D
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
D
Open-Collector B-Port Outputs Sink
100 mA
D
Isolated Logic-Ground and Bus-Ground
Pins Reduce Noise
RC PACKAGE
(TOP VIEW)
CC
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
D
High-Impedance State During Power Up
and Power Down
D
BIAS VCC Pin Minimizes Signal Distortion
During Live Insertion or Withdrawal
D
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
D
Packaged in Plastic Quad Flatpack
GND
AI2
AI3
AO3
GND
AO4
GND
AI4
AI5
AO5
GND
AO6
GND
AI1
GND
AO1
AO7
CC
V
CC
AI7
BG V
OEA
BIAS V
BG GND
OEB
AO8
AO2
52 51 50 49 48 47 46 45 44 43 42 41 40
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
AI6
OEB
TDO
TCK
TDI
V
V
CC
CC
TMS
AI8
GND
GND
B1
39
38
37
36
35
34
33
32
31
30
29
28
27
B8
GND
B2
GND
B3
GND
B4
GND
B5
GND
B6
GND
B7
GND
description
The SN74FB2040 device is an 8-bit transceiver designed to translate signals between TTL and backplane
transceiver logic (BTL) environments.
The B
port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active
and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or VCC is less
than 2.1 V, the B port is turned off.
The A port operates at TTL-signal levels and has separate input and output pins. The A outputs reflect the
inverse of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when V
is less than 2.1 V, the A outputs are in the high-impedance state.
Pins are allocated for the four-wire IEEE Std 1 149.1 (JT AG) test bus. TMS and TCK are not connected and TDI
is shorted to TDO.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
CC
1

SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
description (continued)
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
The SN74FB2040 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OEB OEB OEA
L X L
X HL
L X H
X HH
H L L AI data to B bus
H L H AI data to B bus, B data to AO bus
us
logic symbol
†
OEB
OEA
OEB
AO1
AI1
AO2
AI2
AO3
AI3
AO4
AI4
AO5
AI5
AO6
AI6
AO7
AI7
AO8
AI8
46
47
45
50
51
52
2
4
3
6
8
10
9
12
14
16
18
20
24
G1
EN2
1EN3
21
1
40
B1
3
38
36
34
32
30
28
26
B2
B3
B4
B5
B6
B7
B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

VIHHigh-level input voltage
VILLow-level input voltage
IOLLow-level output current
functional block diagram
OEB
OEB
OEA
AO1
AI1
46
45
47
51
50
To Seven Other Channels
SN74FB2040
8-BIT TTL/BTL TRANSCEIVER
SCBS173I – NOVEMBER 1991 – REVISED SEPTEMBER 1999
40
B1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Except B port –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port –1.2 V to 3.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any B output in the disabled or power-off state, VO –0.5 V to 3.5 V. . . . . . . . . . . . . .
Voltage range applied to any output in the high state, VO: A port –0.5 V to V
Input clamp current, I
: Except B port –40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
. . . . . . . . . . . . . . . . . . . . . . . .
CC
B port –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current applied to any single output in the low state, IO: A port 48 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port 200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
(see Note 1) 44°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 2)
MIN NOM MAX UNIT
V
, BIAS V
BG V
CC
I
IK
I
OH
T
A
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
,
pp
y v
p
p
Input clamp current –18 mA
High-level output current AO port –3 mA
p
Operating free-air temperature 0 70 °C
Implications of Slow or Floating CMOS Inputs
B port 1.62 2.3
Except B port 2
B port 0.75 1.47
Except B port 0.8
AO port 24
B port 100
, literature number SCBA004.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3