Texas Instruments SN74FB1651PCA Datasheet
D
Compatible With IEEE Std 1 194.1-1991
(BTL)
D
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
D
Open-Collector B-Port Outputs Sink
100 mA
D
BIAS VCC Minimizes Signal Distortion
During Live Insertion or Withdrawal
1AI4
1AO5
1AI5
98
99
100
1
NC
CC
NC
CC
NC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
GND
1AO6
1AI6
1AO7
1AI7
GND
1AO8
1AI8
1AO9
1AI9
GND
2CLK
2AO2
2AI2
GND
2AO3
2AI3
2AO4
2AI4
GND
V
1AO4
GND
96
97
30
29
SN74FB1651
17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS177L – OCTOBER 1993 – REVISED SEPTEMBER 1999
D
High-Impedance State During Power Up
and Power Down
D
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
D
TTL-Input Structures Incorporate Active
Clamping to Aid in Line Termination
D
Packaged in Plastic High-Power
Low-Profile Quad Flatpack
PCA PACKAGE
(TOP VIEW)
CC
1AO3
1AI3
94
95
32
31
1AO2
1AI2
92
93
34
33
GND
1AI1
90
91
36
35
CC
1AO1
88
89
38
37
1OEA
1OEA
86
87
40
39
1LEBA
1CLKBA
84
85
42
41
1LEAB
1OEB
1CLKAB
81
82
83
45
44
43
1OEB
BG GND
79
80
47
46
BG V
GND
77
78
49
48
1B1
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
1B2
GND
1B3
1B4
GND
1B5
1B6
GND
1B7
1B8
GND
1B9
NC
2CLKAB
GND
2B2
2B3
GND
2B4
2B5
GND
2B6
2B7
GND
2B8
2AI6
2AI5
2AO5
2AO6
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
CC
2AI7
2AI8
GND
2AO7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2AO8
GND
2AI9
2AO9
V V
2OEA
2OEA
2LEBA
2CLKBA
2CLKAB
2OEB
2LEAB
CC
NC
2B9
GND
2OEB
BIAS V
Copyright 1999, Texas Instruments Incorporated
1
SN74FB1651
FUNCTION
B-bus isolation
A-bus isolation
FUNCTION
17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS177L – OCTOBER 1993 – REVISED SEPTEMBER 1999
description
The SN74FB1651 device contains an 8-bit and a 9-bit transceiver with a buffered clock. The clock and the
transceivers are designed to translate signals between TTL and backplane transceiver-logic (BTL)
environments. It is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB
the B port is turned off.
) are provided for the B outputs. When OEB is low, OEB is high, or VCC is less than 2.1 V ,
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B
A-port output enable (OEA) is high. When OEA is low or when V
is less than 2.1 V , the A outputs are in the
CC
high-impedance state.
BIAS V
establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
CC
BG VCC and BG GND are the supply inputs for the bias generator.
The SN74FB1651 is characterized for operation from 0°C to 70°C.
Function Tables
TRANSCEIVER
INPUTS
OEA OEA OEB OEB
X X H L A data to B bus
L H X X B data to A bus
L H H L A data to B bus, B data to A bus
X X L X
X XXH
H X X X
X L X X
STORAGE MODE
INPUTS
LE CLK
H X Transparent
L ↑ Store data
L L Storage
port when the
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
SN74FB1651
17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS177L – OCTOBER 1993 – REVISED SEPTEMBER 1999
1OEB
1OEB
1CLKAB
1LEAB
1LEBA
1CLKBA
1OEA
1OEA
1AI1
1AO1
81
80
83
82
85
84
87
86
90
89
C1
1D
C2
1D
C2
C1
Transceiver
76
1B1
To Eight Other Channels
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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