D
Compatible With IEEE Std 1 194.1-1991
(BTL)
D
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
D
Open-Collector B-Port Outputs Sink
100 mA
D
BIAS VCC Minimizes Signal Distortion
During Live Insertion or Withdrawal
1AI4
1AO5
1AI5
98
99
100
1
NC
CC
CC
NC
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
GND
1AO6
1AI6
1AO7
1AI7
GND
1AO8
1AI8
1AO9
1AI9
GND
2AO1
2AI1
2AO2
2AI2
GND
2AO3
2AI3
2AO4
2AI4
GND
V
1AO4
GND
96
97
30
29
SN74FB1650
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
D
High-Impedance State During Power Up
and Power Down
D
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
D
TTL Input Structures Incorporate Active
Clamping to Aid in Line Termination
D
Packaged in Plastic High-Power
Low-Profile Quad Flatpack
PCA PACKAGE
(TOP VIEW)
CC
1AO3
1AI3
94
95
32
31
1AI2
92
93
34
33
GND
1AO2
91
35
1AO1
1AI1
89
90
37
36
CC
88
38
1OEA
1OEA
86
87
40
39
1LEBA
1CLKBA
84
85
42
41
1CLKAB
83
43
1LEAB
1OEB
81
82
45
44
1OEB
BG GND
79
80
47
46
GND
BG V
77
78
49
48
1B1
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
1B2
GND
1B3
1B4
GND
1B5
1B6
GND
1B7
1B8
GND
1B9
NC
2B1
GND
2B2
2B3
GND
2B4
2B5
GND
2B6
2B7
GND
2B8
2AI5
2AO5
2AO6
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
CC
2AI8
2AI6
2AI7
GND
2AO7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2AO8
GND
2AI9
2AO9
V V
2OEA
2OEA
2LEBA
2LEAB
2CLKBA
2CLKAB
CC
NC
2B9
2OEB
GND
2OEB
BIAS V
Copyright 1999, Texas Instruments Incorporated
1
SN74FB1650
FUNCTION
B-bus isolation
A-bus isolation
FUNCTION
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
description
The SN74FB1650 device contains two 9-bit transceivers designed to translate signals between TTL and
backplane transceiver-logic (BTL) environments. It is designed specifically to be compatible with
IEEE Std 1 194.1-1991.
The B port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB
the B port is turned off.
) are provided for the B outputs. When OEB is low, OEB is high, or VCC is less than 2.1 V ,
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B
A-port output enable (OEA) is high. When OEA is low or when V
is less than 2.1 V , the A outputs are in the
CC
high-impedance state.
BIAS V
establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
CC
BG VCC and BG GND are the supply inputs for the bias generator.
The SN74FB1650 is characterized for operation from 0°C to 70°C.
Function Tables
TRANSCEIVER
INPUTS
OEA OEA OEB OEB
X X H L A data to B bus
L H X X B data to A bus
L H H L A data to B bus, B data to A bus
X X L X
X XXH
H X X X
X L X X
STORAGE MODE
INPUTS
LE CLK
H X Transparent
L ↑ Store data
L L Storage
port when the
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
SN74FB1650
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
1OEB
1OEB
1CLKAB
1LEAB
1LEBA
1CLKBA
1OEA
1OEA
1AI1
1AO1
81
80
83
82
85
84
87
86
90
89
C1
1D
C2
1D
C2
C1
76
1B1
To Eight Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC, BIAS VCC, BG VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Except B port –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port –1.2 V to 3.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any B
Voltage range applied to any output in the high state, VO –0.5 V to V
Input clamp current, IIK: Except B port –40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current applied to any single output in the low state, IO: A port 48 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
output in the disabled or power-off state, VO –0.5 V to 3.5 V. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B
port 200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 1) 22°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
CC
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN74FB1650
VIHHigh-level input voltage
V
VILLow-level input voltage
V
IOLLow-level output current
mA
V
V
VOHAO port
V
V
V
B
V
V
I
‡
A
I
V
I
0
mA
C
V
V
GND
pF
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
recommended operating conditions (see Note 2)
MIN NOM MAX UNIT
V
CC,
BG VCC,
BIAS V
CC
I
IK
I
OH
T
A
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
electrical characteristics over recommended operating free-air temperature range
IK
V
OL
I
I
‡
I
IH
IL
I
OZH
I
OZL
I
OZPU
I
OZPD
I
OH
§
I
OS
CC
i
C
o
C
io
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
For I/O ports, the parameters IIH and IIL include the off-state output current.
§
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
Supply voltage 4.5 5 5.5 V
p
p
Input clamp current –18 mA
High-level output current A port –3 mA
p
Operating free-air temperature 0 70 °C
Implications of Slow or Floating CMOS Inputs
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
B port VCC = 4.5 V, II = –18 mA –1.2
Except B port VCC = 4.5 V, II = –40 mA –0.5
p
AO port VCC = 4.5 V, IOL = 24 mA 0.35 0.5
port
Except B port VCC = 5.5 V, VI = 5.5 V 50 µA
Except B port VCC = 5.5 V, VI = 2.7 V 50 µA
Except B port VCC = 5.5 V, VI = 0.5 V –50
B port VCC = 5.5 V, VI = 0.75 V –100
AO port VCC = 5.5 V, VO = 2.7 V 50 µA
AO port VCC = 5.5 V, VO = 0.5 V –50 µA
AO port VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V 50 µA
AO port VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V –50 µA
B port VCC = 0 to 5.5 V, VO = 2.1 V 100 µA
A port VCC = 5.5 V, VO = 0 –30 –150 mA
A port to B port
B port to A port
AI port
Control inputs
AO ports VO = VCC or GND 5.5 pF
B port per IEEE Std 1194.1-1991
, literature number SCBA004.
= 4.5
CC
= 4.5
CC
= 5.5 V,
CC
=
or
I
CC
VCC = 0 to 5.5 V 5.5 pF
B port 1.62 2.3
Except B port 2
B port 0.75 1.47
Except B port 0.8
A port 24
B port 100
IOH = –1 mA
IOH = –3 mA 2.5 3.3
IOL = 80 mA 0.75 1.1
IOL = 100 mA 1.15
=
O
100
120
5.5
5.5
V
µ
p
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
I
(BIAS VCC)
V
V
(BIAS VCC)
V
A
tsuSetup time
ns
thHold time
ns
SN74FB1650
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
live-insertion specifications over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
VCC = 0 to 4.5 V
VCC = 4.5 V to 5.5 V
VCC = 0 , VB = 1 V, VI (BIAS VCC) = 4.5 V to 5.5 V –1
VCC = 0 to 5.5 V, OEB = 0 to 0.8 V 100
VCC = 0 to 2.2 V, OEB = 0 to 5 V 100
= 0 to 2 V,
B
I
= 4.5 V to 5.5
V
I
CC
O
O
B port VCC = 0, VI (BIAS VCC) = 5 V 1.62 2.1 V
B port
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V,
f
clock
t
w
TA = 25°C
MIN MAX
Clock frequency 150 150 MHz
Pulse duration CLK or LE 3.3 3.3 ns
p
Data before LE 4.8 4.8
Data before CLK↑ 4.9 4.9
Data after LE 1.8 1.8
Data after CLK↑ 1.1 1.1
MIN MAX UNIT
450
10
µ
µA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN74FB1650
(INPUT)
(OUTPUT)
AI
B
ns
LEAB
B
ns
CLKAB
B
ns
B
AO
ns
LEBA
AO
ns
CLKBA
AO
ns
OEB
B
ns
OEB
B
ns
OEA
AO
ns
OEA
AO
ns
OEA
AO
ns
OEA
AO
ns
t
ns
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
†
t
sk(p)
†
t
sk(o)
t
Transition time
B-port input pulse rejection 1 1 ns
†
Skew values are applicable for through mode only.
Pulse skew,AI to B or B to AO 1 ns
Pulse skew, AI to B or B to AO 0.5 ns
B outputs (1.3 V to 1.8 V) 0.9 1.7 3.1 0.5 4.6
AO outputs (10% to 90%) 0.5 2 3.6 0.4 4.2
FROM
TO
VCC = 5 V,
TA = 25°C
MIN TYP MAX
150 150 MHz
1.8 3.7 5.3 1.8 6.2
2.9 4.4 6 2.9 7.2
2.7 4.2 5.8 2.7 6.4
3.5 5 6.5 3.5 7.3
2.3 3.9 5.5 2.3 6
2.9 4.5 6.1 2.9 6.7
3.5 5.9 7.9 3.5 8.6
2.2 3.7 5.3 2.2 5.7
1.8 3.2 4.6 1.8 5.1
1.7 3 4.4 1.7 4.7
1.8 3.1 4.6 1.8 5.1
1.7 3.1 4.6 1.7 4.9
2.7 4.6 6.4 2.7 6.7
2.9 4.1 5.9 2.9 6.6
2.6 4.3 6.2 2.6 6.6
3.4 4.6 6.4 3.4 7
1.4 2.9 4.4 1.4 4.9
1.4 2.6 4 1.4 4.6
1.7 3.4 5.1 1.7 5.8
2.2 3.6 5 2.2 5.5
1.7 3.3 4.7 1.7 5.5
1.7 3.1 4.4 1.7 5.1
1.5 2.9 4.5 1.5 5.1
2 3.1 4.6 2 4.8
MIN MAX UNIT
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB1650
18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999
PARAMETER MEASUREMENT INFORMATION
2.1 V
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
Input
Input 1.5 V 1.5 V
Output
PROPAGATION DELAY TIMES (A TO B)
Input
Output
PROPAGATION DELAY TIMES (B TO A)
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
500 Ω
500 Ω
t
w
t
PHL
t
PHL
1.5 V 1.5 V
7 V
S1
1.55 V1.55 V
t
1.55 V1.55 V
t
Open
GND
PLH
PLH
3 V
0 V
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT FOR B OUTPUTS
Timing Input
3 V
0 V
V
V
2 V
1 V
V
V
OH
OL
OH
OL
Data Input
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
ENABLE AND DISABLE TIMES (A PORT)
16.5 Ω
Test
Point
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V 1.5 V
t
PZL
1.5 V
t
PZH
1.5 V
VOLTAGE WAVEFORMS
TEST S1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
1.5 V
t
h
t
PLZ
VOL + 0.3 V
t
PHZ
VOH – 0.3 V
Open
7 V
Open
3 V
0 V
3 V
0 V
3 V
0 V
3.5 V
V
OL
V
OH
≈ 0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns,
tf≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1999, Texas Instruments Incorporated
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