Texas Instruments SN74F573DW, SN74F573DWR, SN74F573N Datasheet

SN54F573, SN74F573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDFS011A – MARCH 1987 – REVISED OCTOBER 1993
Copyright 1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Eight Latches in a Single Package
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
description
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the F573 are transparent D-type latches. While the latch enable (LE) input is high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output enable (OE
) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high­impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
The output enable (OE
) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state. The SN54F573 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F573 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE LE D
Q
L H H H L HL L LLX Q
0
HXX Z
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
OE
1D 2D 3D 4D 5D 6D 7D 8D
GND
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE
SN54F573 ...J PACKAGE
SN74F573 . . . DW OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4 5 6 7 8
18 17 16 15 14
2Q 3Q 4Q 5Q 6Q
3D 4D 5D 6D 7D
2D1DOE
8Q
7Q
1Q
8D
GND
LE
V
CC
SN54F573 . . . FK PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN54F573, SN74F573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDFS011A – MARCH 1987 – REVISED OCTOBER 1993
2–2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
logic diagram (positive logic)
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
C1
11
LE
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
7
6D
8
7D
9
8D
EN
1
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1 1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state –0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state: SN54F573 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F573 48 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54F573 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F573 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F573 SN74F573
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
I
IK
Input clamp current –18 –18 mA
I
OH
High-level output current –3 –3 mA
I
OL
Low-level output current 20 24 mA
T
A
Operating free-air temperature –55 125 0 70 °C
SN54F573, SN74F573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDFS011A – MARCH 1987 – REVISED OCTOBER 1993
2–3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54F573 SN74F573
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
IOH = – 1 mA 2.5 3.4 2.5 3.4
V
OH
V
CC
= 4.5
V
IOH = – 3 mA 2.4 3.3 2.4 3.3 V
VCC = 4.75 V , IOH = – 1 mA to –3 mA 2.7
IOL = 20 mA 0.3 0.5
V
OL
V
CC
= 4.5
V
IOL = 24 mA 0.35 0.5
V
I
OZH
VCC = 5.5 V, VO = 2.7 V 50 50 µA
I
OZL
VCC = 5.5 V, VO = 0.5 V –50 –50 µA
I
I
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
I
IH
VCC = 5.5 V, VI = 2.7 V 20 20 µA
I
IL
VCC = 5.5 V, VI = 0.5 V – 0.6 – 0.6 mA
I
OS
VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA
I
CCZ
VCC = 5.5 V, See Note 2 38 55 38 55 mA
All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2: I
CCZ
is measured with OE
at 4.5 V and all other inputs grounded.
timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
SN54F573 SN74F573
F573
UNIT
MIN MAX MIN MAX MIN MAX
t
w
Pulse duration, LE high 6 6 6 ns
t
su
Setup time, data before LE
2 2 2 ns
t
h
Hold time, data after LE 3 3 3 ns
switching characteristics (see Note 3)
PARAMETER
FROM
(
INPUT
)
TO
(
OUTPUT
)
VCC = 5 V, CL = 50 pF, RL = 500 , TA = 25°C
VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500, TA = MIN to MAX
§
UNIT
(INPUT)
(OUTPUT)
F573 SN54F573 SN74F573
MIN TYP MAX MIN MAX MIN MAX
t
PLH
2 4.9 7 1.5 9 2.2 8
t
PHL
D
Q
1.2 3.3 5 1 8 1.2 6
ns
t
PLH
4.2 8.6 11.5 3.7 13.5 4.2 13
t
PHL
LE
Q
2.2 4.8 7 1.5 9 2.2 8
ns
t
PZH
1.2 4.6 11 1 13 1.2 12
t
PZL
OE
Q
1.2 5.2 7.5 1 10 1.2 8.5
ns
t
PHZ
1.2 4.1 6.5 1 8.5 1.2 7.5
t
PLZ
OE
Q
1.2 3.4 6 1 7 1.2 6
ns
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
SN54F573, SN74F573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDFS011A – MARCH 1987 – REVISED OCTOBER 1993
2–4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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Copyright 1998, Texas Instruments Incorporated
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