Texas Instruments SN74F280BD, SN74F280BDR, SN74F280BN, SN74F280BN3 Datasheet
SN54F280B, SN74F280B
9-BIT PARITY GENERATORS/CHECKERS
SDFS008A – D2932, APRIL 1986 – REVISED OCTOBER 1993
Copyright 1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• Generates Either Odd or Even Parity for
Nine Data Lines
• Cascadable for N-Bits Parity
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These universal, monolithic, 9-bit parity
generators/checkers feature odd and even
outputs to facilitate operation of either odd or even
parity application. The word-length capability is
easily expanded by cascading.
The SN54F280B is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74F280B is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
NO. OF INPUTS
OUTPUTS
A THRU I
THAT ARE HIGH
Σ EVEN Σ ODD
0, 2, 4, 6, 8 H L
1, 3, 5, 7, 9 L H
logic symbol
†
2k
12
E
8
A
9
B
10
C
11
D
13
F
1
G
2
H
4
I
6
5
Σ EVEN
Σ ODD
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54F280B ...J PACKAGE
SN74F280B ...D OR N PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
E
NC
D
NC
C
NC
NC
I
NC
Σ EVEN
SN54F280B ...FK PACKAGE
(TOP VIEW)
HGNC
A
B
F
ODD
GND
NC
NC – No internal connection
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
G
H
NC
I
Σ EVEN
Σ ODD
GND
V
CC
F
E
D
C
B
A
Σ
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54F280B, SN74F280B
9-BIT PARITY GENERATORS/CHECKERS
SDFS008A – D2932, APRIL 1986 – REVISED OCTOBER 1993
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
A
B
C
8
9
10
D
E
F
11
12
13
G
H
I
1
2
4
5
6
Σ EVEN
Σ ODD
Pin numbers shown are for the D, J, and N packages.
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