SN74F2245
25-Ω OCT AL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MA Y 1995
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D
Package Options Include Plastic
Small-Outline (DB) Packages and Plastic
300-mil DIPs (N)
description
The SN74F2245 is designed for asynchronous
communication between data buses. The devices
transmit data from the A bus to the B bus or from
the B bus to the A bus depending upon the logic
level at the direction-control (DIR) input. The
output-enable (OE
) input disables the device so
the buses are effectively isolated.
Both A and B outputs can sink up to 12 mA; 25-Ω resistors are included in the lower output circuit to reduce
overshoot and undershoot.
The SN74F2245 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OE DIR
OPERATION
L L B data to A bus
L H A data to B bus
H X Isolation
logic symbol
†
logic diagram (positive logic)
A5
6
A6
7
A7
8
A8
9
A2
3
A3
4
A4
5
OE
A1
2
G3
19
3EN2[AB]
B5
14
B6
13
B7
12
B8
11
B1
18
B2
17
B3
16
B4
15
3EN1[BA]
1
DIR
DIR
OE
A1
B1
1
2
18
19
To Seven Other Channels
1
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DB OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
SN74F2245
25-Ω OCT AL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MA Y 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(except I/O ports) (see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state –0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
I
IK
Input clamp current –18 mA
I
OH
High-level output current –3 mA
I
OL
Low-level output current 12 mA
T
A
Operating free-air temperature 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 V
IOH = – 1 mA 2.5 3.4
V
OH
Any output
V
CC
= 4.5
V
IOH = – 3 mA 2.4 3.3
V
VCC = 4.75 V , IOH = –1 mA to – 3 mA 2.7
p
IOL = 1 mA 0.2 0.5
VOLAny output
V
CC
=
4.5 V
IOL = 12 mA 0.5 0.75
V
A and B
VI = 5.5 V 1
I
I
DIR and OE
V
CC
= 5.5
V
VI = 7 V 0.1
mA
A and B
70
I
IH
§
DIR and OE
V
CC
= 5.5 V,
V
I
= 2.7
V
20
µ
A
A and B
–0.5
I
IL
§
DIR and OE
V
CC
=
5.5 V
,
V
I
=
0.5 V
– 0.5
mA
I
OS
¶
A and B VCC = 5.5 V, VO = 0 –50 –120 mA
Outputs high 62 90
I
CC
VCC = 5.5 V
Outputs low 73 105
mA
Outputs disabled 72 100
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
For I/O ports, the parameters IIH and IIL include the off-state output current.
¶
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
SN74F2245
25-Ω OCT AL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MA Y 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
MIN TYP MAX MIN MAX
t
PLH
2.5 3.9 5.5 2.1 6.6
t
PHL
A or B
B or A
3.1 4.6 6.6 2.9 7.1
ns
t
PZH
2.4 4.8 7.3 1.6 8.5
t
PZL
OE
A or B
3.6 6.6 10.6 3 12
ns
t
PHZ
2.3 4.3 6.3 2 7.5
t
PLZ
OE
A or B
2 4 5.8 1.9 6.8
ns
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN74F2245
25-Ω OCT AL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SDFS099 – MA Y 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
R1
C
L
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
R1
S1
7 V (t
PZL
, t
PLZ
)
Open
(all others)
From Output
Under Test
Test
Point
R2
C
L
(see Note A)
RL = R1 = R2
1.5 V
1.5 V
1.5 V
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing Input
(see Note C)
Data Input
(see Note C)
1.5 V
1.5 V
3 V
3 V
0 V
0 V
High-Level
Pulse
(see Note C)
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
t
PHL
t
PLH
t
PLH
t
PHL
Input
(see Note C)
Out-of-Phase
Output
(see Note E)
1.5 V 1.5 V
1.5 V1.5 V
1.5 V 1.5 V
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
(see Note E)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
t
PHZ
t
PLZ
0.3 V
t
PZL
t
PZH
1.5 V1.5 V
1.5 V
1.5 V
3 V
0 V
Output
Control
(low-level enable)
Waveform 1
(see Notes B and E)
Waveform 2
(see Notes B and E)
0 V
V
OH
V
OL
3.5 V
0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, tr = tf≤ 2.5 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is open.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated
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