Datasheet SN74F2244DWR, SN74F2244N, SN74F2244DBLE, SN74F2244DBR, SN74F2244DW Datasheet (Texas Instruments)

SN74F2244

25-Ω OCTAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers

D

Package Options Include Plastic
Small-Outline (DW) Packages and
Standard Plastic (N) 300-mil DIPs

description

This octal buffer and line driver is designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.

The 25-Ω resistors in the lower output circuit
reduce ringing and eliminate the need for external
resistors.

The SN74F2244 is characterized for operation
from 0°C to 70°C.

FUNCTION TABLE

(each buffer)

INPUTS

OUTPUT

OE

A

Y

L H H
L LL
HXZ

Copyright  1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

1OE

1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1

GND

V

CC

2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1

DW OR N PACKAGE

(TOP VIEW)

SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS

SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

logic diagram (positive logic)

1OE

2

1A1

4

1A2

6

1A3

8

1A4

EN

1

1Y1

18

1Y2

16

1Y3

14

1Y4

12

2OE

11

2A1

13

2A2

15

2A3

17

2A4

EN

19

2Y1

9

2Y2

7

2Y3

5

2Y4

3

1

2

4

6

8

19

11

13

15

17

3

5

7

9

12

14

16

18

1A1

1A2

1A3

1A4

1Y1

2A1

2A2

2A3

2A4

2Y1

1Y2

1Y3

1Y4

2Y2

2Y3

2Y4

1OE

2OE

†

This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

1

1

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

‡

Supply voltage range, V

CC

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I

(see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input current range, I

I

–30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the disabled or power-off state, V

O

–0.5 V to 5.5 V. . . . . . . . . . . . . . .

Voltage range applied to any output in the high state, V

O

–0.5 V to V

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current into any output in the low state, I

O

30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range,T

A

0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The input voltage ratings may be exceeded if the input current ratings are observed.

SN74F2244

25-Ω OCTAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions

MIN NOM MAX UNIT

V

CC

Supply voltage 4.5 5 5.5 V

V

IH

High-level input voltage 2 V

V

IL

Low-level input voltage 0.8 V

I

IK

Input clamp current –18 mA

I

OH

High-level output current –15 mA

I

OL

Low-level output current 12 mA

T

A

Operating free-air temperature 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

PARAMETER TEST CONDITIONS

†

MIN TYP†MAX UNIT

V

IK

VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V, IOH = – 3 mA 2.4 2.8

V

OH

VCC = 4.5 V IOH = – 15 mA 2 2.3

V
VCC = 4.75 V , IOH = – 3 mA 2.7
VCC = 4.5 V, IOL = 1 mA 0.2 0.5

V

OL

VCC = 4.5 V, IOL = 12 mA 0.5 0.75

V

I

I

VCC = 5.5 V, VI = 0.5 V 0.1 mA

I

OZH

VCC = 5.5 V, VO = 7 V 50 µA

I

OZL

VCC = 5.5 V, VO = 2.7 V –50 µA

I

IH

VCC = 5.5 V, VI = 2.7 V 20 µA

Any OE input

–1

I

IL

Any A input

V

CC

= 5.5 V,

V

I

= 0.5

V

– 1.6

mA

I

OS

‡

VCC = 5.5 V, VO = 0 –100 –225 mA

Outputs high 40 60

I

CC

V

CC

=

5.5 V

,

p

p

Outputs low 60 90

mA

Out uts oen

Outputs disabled 60 90

†

All typical values are at VCC = 5 V, TA = 25°C.

‡

Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

switching characteristics (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,
CL = 50 PF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C

VCC = 4.5 V TO 5.5 V,
CL = 50 PF,
R1 = 500Ω,
R2 = 500Ω,
TA = MIN TO MAX§

UNIT

MIN MAX MIN MAX

t

PLH

1.5 7 1.5 7

t

PHL

A

Y

2.5 8 2 8

ns

t

PZH

1.5 9 1 9.5

t

PZL

OE

Y

2.5 11.5 2.5 12

ns

t

PHZ

1.5 9 1 9.5

t

PLZ

OE

Y

1.5 8.5 1.5 9.5

ns

§

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

SN74F2244
25-Ω OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS

SDFS095B – NOVEMBER 1993 – REVISED JANUARY 1996

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

Test
Point

R1

C

L

(see Note A)

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

LOAD CIRCUIT FOR

3-STATE AND OPEN-COLLECTOR OUTPUTS

R1

S1

7 V (t

PZL

, t

PLZ

, O.C.)

Open
(all others)

From Output

Under Test

Test
Point

R2

C

L

(see Note A)

RL = R1 = R2

1.5 V

1.5 V

1.5 V

3 V

3 V

0 V

0 V

t

h

t

su

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing Input

(see Note C)

Data Input

(see Note C)

1.5 V

1.5 V

3 V

3 V

0 V

0 V

High-Level

Pulse

(see Note C)

Low-Level

Pulse

t

w

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V

1.5 V

t

PHL

t

PLH

t

PLH

t

PHL

Input

(see Note C)

Out-of-Phase

Output

(see Note E)

1.5 V 1.5 V

1.5 V1.5 V

1.5 V 1.5 V

3 V

0 V

V

OL

V

OH

V

OL

In-Phase

Output

(see Note E)

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES (see Note D)

t

PHZ

t

PLZ

0.3 V

t

PZL

t

PZH

1.5 V1.5 V

1.5 V

3 V

0 V

Output

Control

(low-level enable)

Waveform 2

(see Notes B and E)

0 V

V

OH

V

OL

3.5 V

0.3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, tr = tf≤ 2.5 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is open.
E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

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Copyright  1998, Texas Instruments Incorporated