Texas Instruments SN74CBTS6800DBR, SN74CBTS6800DGVR, SN74CBTS6800DW, SN74CBTS6800DWR, SN74CBTS6800PWR Datasheet

...
SN74CBTS6800
10-BIT FET BUS SWITCH
WITH PRECHARGED OUTPUTS AND SCHOTTKY DIODE CLAMPING
SCDS102A – JUNE 1999 – REVISED JUL Y 1999
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
D
TTL-Compatible Input Levels
D
Outputs Are Precharged by Bias Voltage to Minimize Signal Distortion During Live Insertion
D
Schottky Diodes on the I/Os to Clamp Undershoots up to –2 V
D
Package Options Include Plastic Shrink Small-Outline (DB, DBQ), Thin Very Small-Outline (DGV), Small-Outline (DW), and Thin Shrink Small-Outline (PW) Packages
description
The SN74CBTS6800 provides ten bits of high-speed TTL-compatible bus switching with Schottky diodes on the I/Os to clamp undershoot.
The low on-state resistance of the switch allows bidirectional connections to be made, while adding near-zero propagation delay . The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.
The SN74CBTS6800 is organized as one 10-bit switch with a single enable (ON
) input. When ON is low, the
switch is on, and port A is connected to port B. When ON
is high, the switch between port A and port B is open.
When ON
is high or VCC is 0 V, B port is precharged to BIASV through the equivalent of a 10-k resistor.
The SN74CBTS6800 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
ON
B1–B10 FUNCTION
L A1–A10 Connect H BIASV Precharge
logic diagram (positive logic)
ON
A1
A10
B1
BIASV
B10
2
11
1
13
23
14
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
ON
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10
GND
V
CC
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 BIASV
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN74CBTS6800 10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS AND SCHOTTKY DIODE CLAMPING
SCDS102A – JUNE 1999 – REVISED JUL Y 1999
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bias voltage range, BIASV –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DB package 104°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DBQ package 103°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 139°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
CC
Supply voltage 4 5.5 V
BIASV Supply voltage 1.3 V
CC
V
V
IH
High-level control input voltage 2 V
V
IL
Low-level control input voltage 0.8 V
T
A
Operating free-air temperature –40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
A or B inputs
–0.7
V
IK
Control inputs
V
CC
=
4.5 V
,
I
I
= –
18 mA
–1.2
V
I
IL
VCC = 5.5 V, VI = GND –5 µA
I
IH
VCC = 5.5 V, VI = 5.5 V 150 µA
I
O
VCC = 4.5 V, BIASV = 2.4 V , VO= 0 0.25 mA
I
CC
VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
I
CC
§
Control inputs VCC = 5.5 V, One input at 3.4 V , Other inputs at VCC or GND 2.5 mA
C
i
Control inputs VI = 3 V or 0 3.5 pF
C
io(OFF)
VO = 3 V or 0, ON = V
CC
4.5 pF
VCC = 4 V, TYP at VCC = 4 V
VI = 2.4 V, II = 15 mA 11 20
r
II = 64 mA 3 7
on
VCC = 4.5 V
V
I
=
0
II = 30 mA 3 7
VI = 2.4 V, II = 15 mA 6 15
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
SN74CBTS6800
10-BIT FET BUS SWITCH
WITH PRECHARGED OUTPUTS AND SCHOTTKY DIODE CLAMPING
SCDS102A – JUNE 1999 – REVISED JUL Y 1999
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
TEST
FROM
TO
VCC = 4 V
VCC = 5 V
± 0.5 V
UNIT
CONDITIONS
(INPUT)
(OUTPUT)
MIN MAX MIN MAX
t
pd
A or B B or A 0.35 0.25 ns
t
PZH
BIASV = GND
6 2 5.1
t
PZL
BIASV = 3 V
ON
A or B
6 2 5.6
ns
t
PHZ
BIASV = GND
5.5 1 5
t
PLZ
BIASV = 3 V
ON
A or B
5.5 2 5.9
ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
V
OH
V
OL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500
500
t
PLH
t
PHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
V
OH
V
OL
0 V
VOL + 0.3 V
VOH – 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as tpd.
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
Loading...