Texas Instruments SN74CBTLV3861DBQR, SN74CBTLV3861DGV, SN74CBTLV3861DGVR, SN74CBTLV3861DW, SN74CBTLV3861DWR Datasheet

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SN74CBTLV3861
LOW-VOLTAGE 10-BIT FET BUS SWITCH
SCDS041D – DECEMBER 1997 – REVISED NOVEMBER 1999
D
Functionally Equivalent to QS3861
D
D
Isolation Under Power-Off Conditions
D
Flow-Through Architecture Optimizes PCB Layout
D
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
D
Package Options Include Shrink Small-Outline (DBQ), Thin Very Small-Outline (DGV), Small-Outline (DW), and Thin Shrink Small-Outline (PW) Packages
description
The SN74CBTLV3861 provides ten bits of
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
NC
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A9
10
A10
11
GND
NC – No internal connection
12
24 23 22 21 20 19 18 17 16 15 14 13
V
CC
OE B1 B2 B3 B4 B5 B6 B7 B8 B9 B10
high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 10-bit bus switch. When output enable (OE) is low, the 10-bit bus switch is on and port A is connected to port B. When OE
is high, the switch is open and the high-impedance state exists
between the two ports. T o ensure the high-impedance state during power up or power down, OE
should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74CBTLV3861 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUT
OE
L A port = B port
H Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FUNCTION
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
SN74CBTLV3861 LOW-VOLTAGE 10-BIT FET BUS SWITCH
SCDS041D – DECEMBER 1997 – REVISED NOVEMBER 1999
logic diagram (positive logic)
A1
A10
OE
simplified schematic, each FET switch
A
2
11
23
SW
SW
(OE)
22
13
B1
B10
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Package thermal impedance, θJA (see Note 2): DBQ package 61°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O
IK
DGV package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 46°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 88°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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