Texas Instruments SN74CBTLV3383PWR, SN74CBTLV3383DBQR, SN74CBTLV3383DGVR, SN74CBTLV3383DW, SN74CBTLV3383DWR Datasheet
SN74CBTL V3383
LOW-VOLTAGE 10-BIT FET BUS-EXCHANGE SWITCH
SCDS047D – MARCH 1998 – REVISED NOVEMBER 1999
D
Functionally Equivalent to QS3383 and
QS3L383
D
5-Ω Switch Connection Between Two Ports
D
Isolation Under Power-Off Conditions
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Shrink
Small-Outline (DBQ), Thin Very
Small-Outline (DGV), Small-Outline (DW),
and Thin Shrink Small-Outline (PW)
Packages
DBQ, DGV, DW, OR PW PACKAGE
BE
1B1
1A1
1A2
1B2
2B1
2A1
2A2
2B2
3B1
3A1
GND
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
V
CC
5B2
5A2
5A1
5B1
4B2
4A2
4A1
4B1
3B2
3A2
BX
description
The SN74CBTL V3383 provides ten bits of high-speed bus switching or exchanging. The low on-state resistance
of the switch allows connections to be made with minimal propagation delay.
The device operates as a 10-bit bus switch or a 5-bit bus exchanger, which provides swapping of the A and B
pairs of signals. The bus-exchange function is selected when BX is high and BE is low.
The SN74CBTLV3383 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
BE BX 1A1–5A1 1A2–5A2
L L 1B1–5B1 1B2–5B2
L H 1B2–5B2 1B1–5B1
H X Z Z
INPUTS/OUTPUTS
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
SN74CBTLV3383
LOW-VOLTAGE 10-BIT FET BUS-EXCHANGE SWITCH
SCDS047D – MARCH 1998 – REVISED NOVEMBER 1999
logic diagram (positive logic)
3
4
21
22
SW
SW
SW
SW
SW
SW
SW
SW
20
23
2
1B11A1
5
1B21A2
5B15A1
5B25A2
1
BE
13
BX
simplified schematic, each FET switch
A
B
(OE)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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