Texas Instruments SN74CBTLV3245ADBQR, SN74CBTLV3245ADGVR, SN74CBTLV3245ADW, SN74CBTLV3245ADWR, SN74CBTLV3245APWR Datasheet
FUNCTION
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034H – JULY 1997 – REVISED NOVEMBER 1999
D
Standard ’245-Type Pinout
D
5-Ω Switch Connection Between Two Ports
D
Isolation Under Power-Off Conditions
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Shrink
Small-Outline (DBQ), Thin Very
Small-Outline (DGV), Small-Outline (DW),
and Thin Shrink Small-Outline (PW)
DBQ, DGV, DW, OR PW PACKAGE
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
(TOP VIEW)
20
1
19
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
10
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
CC
Packages
NC – No internal connection
description
The SN74CBTL V3245A provides eight bits of high-speed bus switching in a standard ’245 device pinout. The
low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 8-bit switch. When output enable (OE) is low, the 8-bit bus switch is on and A port
is connected to B port. When OE
two ports.
T o ensure the high-impedance state during power up or power down, OE
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
is high, the switch is open and the high-impedance state exists between the
should be tied to VCC through a pullup
The SN74CBTLV3245A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUT
OE
L A port = B port
H Disconnect
logic diagram (positive logic)
2
A1
A8
OE
9
19
SW
SW
18
11
B1
B8
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
SN74CBTLV3245A
VIHHigh-level control input voltage
V
VILLow-level control input voltage
V
LOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034H – JULY 1997 – REVISED NOVEMBER 1999
simplified schematic, each FET switch
A
(OE)
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
(see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O
(see Note 2): DBQ package 68°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
IK
DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
T
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Supply voltage 2.3 3.6 V
CC
p
p
Operating free-air temperature –40 85 °C
A
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
VCC = 2.3 V to 2.7 V 1.7
VCC = 2.7 V to 3.6 V 2
VCC = 2.3 V to 2.7 V 0.7
VCC = 2.7 V to 3.6 V 0.8
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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