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SN74CBTLV16210
LOW-VOLTAGE 20-BIT FET BUS SWITCH
SCDS042E – DECEMBER 1997 – REVISED FEBRUARY 1999
D
5-Ω Switch Connection Between Two Ports
D
Isolation Under Power-Off Conditions
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and 300-mil Shrink
Small-Outline (DL) Packages
description
The SN74CBTLV16210 provides 20 bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as dual 10-bit bus
switches with separate output-enable (OE
inputs. It can be used as two 10-bit bus switches
or one 20-bit bus switch. When OE
associated 10-bit bus switch is on and port A is
connected to port B. When OE
is open, and the high-impedance state exists
between the two ports.
T o ensure the high-impedance state during power
up or power down, OE
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN74CBTLV16210 is characterized for
operation from –40°C to 85°C.
is high, the switch
should be tied to V
is low, the
CC
DGG, DGV, OR DL PACKAGE
)
(TOP VIEW)
NC
1
1A1
2
1A2
3
1A3
4
1A4
5
1A5
6
1A6
7
GND
1A10
GND
2A10
NC – No internal connection
1A7
1A8
1A9
2A1
2A2
V
CC
2A3
2A4
2A5
2A6
2A7
2A8
2A9
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
(each 10-bit bus switch)
INPUT
OE
L A port = B port
H Disconnect
FUNCTION
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
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SN74CBTLV16210
LOW-VOLTAGE 20-BIT FET BUS SWITCH
SCDS042E – DECEMBER 1997 – REVISED FEBRUARY 1999
logic diagram (positive logic)
1A1
1A10
1OE
2A1
2A10
2OE
simplified schematic, each FET switch
2
12
48
13
24
47
SW
SW
SW
SW
46
36
35
25
1B1
1B10
2B1
2B10
A
OE
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(see Note 2): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DGV package 93°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265