Datasheet SN74CBT16390DGGR, SN74CBT16390DGVR, SN74CBT16390DL, SN74CBT16390DLR Datasheet (Texas Instruments)
FUNCTION
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and 300-mil Shrink
Small-Outline (DL) Packages
description
The SN74CBT16390 is a 16-bit to 32-bit switch
used in applications in which two separate data
paths must be multiplexed onto, or demultiplexed
from, a single path. This device can be used for
memory interleaving, in which two different banks
of memory must be addressed simultaneously.
This also can be used to connect or isolate the PCI
bus to one or two slots simultaneously.
Two output enables (OE1
data flow. When OE1
to 1B port. When OE2
to 2B port. When both OE1
A port is connected to both 1B and 2B ports. The
control inputs can be driven with a 5-V CMOS, 5-V
TTL, or an LVTTL driver.
The SN74CBT16390 is characterized for
operation from –40°C to 85°C.
and OE2) control the
is low, A port is connected
is low, A port is connected
and OE2 are low, the
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
A1
1
2B1
2
2B2
3
A3
4
2B3
5
2B4
6
A5
7
2B5
8
2B6
9
A7
10
2B7
11
2B8
12
GND
13
V
14
CC
A9
15
2B9
16
2B10
2B12
2B13
2B14
2B15
2B16
17
A1 1
18
2B1 1
19
20
21
A13
22
23
24
A15
25
26
27
NC
28
NC
NC – No internal connection
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1B1
1B2
A2
1B3
1B4
A4
1B5
1B6
A6
1B7
1B8
A8
GND
V
CC
1B9
1B10
A10
1B1 1
1B12
A12
1B13
1B14
A14
1B15
1B16
A16
OE1
OE2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
INPUTS
OE1 OE2
L L A = 1B and A = 2B
L H A = 1B
H L A = 2B
H H Isolation
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Copyright 1998, Texas Instruments Incorporated
1
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
logic diagram (positive logic)
A1
A16
OE1
OE2
1
31
30
29
56
32
26
1B1
2
2B1
1B16
2B16
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, V
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(V
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(see Note 2): DGG package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DGV package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 74°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
V
V
T
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
2
Supply voltage 4.5 5.5 V
CC
High-level control input voltage 2 V
IH
Low-level control input voltage 0.8 V
IL
Operating free-air temperature –40 85 °C
A
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
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I
A
§
V
0
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
IK
I
I
CC
‡
∆I
CC
C
i
C
io(OFF)
r
on
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§
Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the
lower of the voltages of the two (A or B) terminals.
Control inputs VCC = 5.5 V, One input at 3.4 V , Other input at VCC or GND 2.5 mA
Control inputs VI = 3 V or 0 5 pF
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
¶
t
pd
t
en
t
dis
¶
The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when
driven by an ideal voltage source (zero output impedance).
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 0, VI = 5.5 V 10
VCC = 5.5 V, VI = 5.5 V or GND ±1
VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
VO = 3 V or 0 5.5 pF
II = 64 mA 5 7
II = 30 mA 5 7
TO
(OUTPUT)
A or B 1.3 5.9 ns
A or B 1 5.3 ns
MIN MAX UNIT
VCC = 4.5 V
=
I
VI = 2.4 V, II = 15 mA 7 12
FROM
(INPUT)
A or B B or A 0.25 ns
OE
OE
µ
Ω
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
dis
S1
.
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
Input
t
PLH
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. t
F. t
G. t
1.5 V 1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
and t
PLZ
PZL
PLH
and t
and t
PHZ
PZH
PHL
500 Ω
500 Ω
1.5 V 1.5 V
are the same as t
are the same as ten.
are the same as tpd.
t
PHL
7 V
Open
GND
3 V
0 V
V
OH
V
OL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
TEST S1
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
t
PZL
t
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
t
PLZ
1.5 V
t
PHZ
1.5 V
Open
7 V
Open
1.5 V1.5 V
VOL + 0.3 V
VOH – 0.3 V
3 V
0 V
3.5 V
V
OL
V
OH
0 V
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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