www.ti.com
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B4
B3
B2
B1
A
NC
OE
GND
V
CC
B5
B6
B7
B8
S0
S1
S2
DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
NC - No internal connection
RGY PACKAGE
(TOP VIEW)
1 16
8 9
2
3
4
5
6
7
15
14
13
12
11
10
B5
B6
B7
B8
S0
S1
B3
B2
B1
A
NC
OE
B4
S2
V
GND
CC
NC - No internal connection
查询SN74CB3Q3251供应商
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
FEATURES
• High-Bandwidth Data Path (up to 500 MHz
• Equivalent to IDTQS3VH251 Device
• 5-V Tolerant I/Os With Device Powered Up or
(1)
)
• Data and Control Inputs Provide Undershoot
Clamp Diodes
• Low Power Consumption (I
• V
Operating Range From 2.3 V to 3.6 V
CC
Powered Down • Data I/Os Support 0- to 5-V Signaling Levels
• Low and Flat ON-State Resistance (r
)
on
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
Characteristics Over Operating Range • Control Inputs Can Be Driven by TTL or
(r
= 4 Ω Typ) 5-V/3.3-V CMOS Outputs
on
• Rail-to-Rail Switching on Data I/O Ports • I
– 0- to 5-V Switching With 3.3-V V
– 0- to 3.3-V Switching With 2.5-V V
CC
CC
• Latch-Up Performance Exceeds 100 mA Per
• Bidirectional Data Flow With Near-Zero
Propagation Delay
• ESD Performance Tested Per JESD 22
• Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
= 3.5 pF Typ) – 1000-V Charged-Device Model (C101)
io(OFF)
Supports Partial-Power-Down Mode
off
Operation
JESD 78, Class II
– 2000-V Human-Body Model (A114-B,
Class II)
• Fast Switching Frequency • Supports Both Digital and Analog
(f
or fS= 20 MHz Max) Applications: PCI Interface, Differential Signal
OE
(1) For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI application
report, CBT-C, CB3T, and CB3Q Signal-Switch Families,
literature number SCDA008.
Interface, Memory Interleaving, Bus Isolation,
Low-Distortion Signal Gating
= 1 mA Typ)
CC
DESCRIPTION/ORDERING INFORMATION
The SN74CB3Q3251 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of
the pass transistor, providing a low and flat ON-state resistance (r
for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device
also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the SN74CB3Q3251 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
). The low and flat ON-state resistance allows
on
Copyright © 2004–2005, Texas Instruments Incorporated
www.ti.com
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74CB3Q3251 is a 1-of-8 multiplexer/demultiplexer with a single output-enable ( OE) input. The select (S0,
S1, S2) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the
multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow
between ports. When OE is high, the multiplexer/demultiplexer is disabled, and a high-impedance state exists
between the A and B ports.
This device is fully specified for partial-power-down applications using I
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
QFN – RGY Tape and reel SN74CB3Q3251RGYR BU251
SSOP (QSOP) – DBQ Tape and reel SN74CB3Q3251DBQR BU251
–40°C to 85°C Tube SN74CB3Q3251PW
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
TSSOP – PW BU251
TVSOP – DGV Tape and reel SN74CB3Q3251DGVR BU251
PACKAGE
(1)
Tape and reel SN74CB3Q3251PWR
ORDERABLE PART NUMBER TOP-SIDE MARKING
. The I
off
circuitry prevents damaging
off
through a pullup
CC
FUNCTION TABLE
INPUTS
OE S2 S1 S0
L L L L B1 A port = B1 port
L L L H B2 A port = B2 port
L L H L B3 A port = B3 port
L L H H B4 A port = B4 port
L H L L B5 A port = B5 port
L H L H B6 A port = B6 port
L H H L B7 A port = B7 port
L H H H B8 A port = B8 port
H X X X Z Disconnect
INPUT/OUTPUT
A
FUNCTION
2
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B5
B1
A
S0
S1
S2
OE
B2
B3
B4
B6
B7
B8
SW
SW
SW
SW
SW
SW
SW
SW
5
11
10
9
7
4
3
2
1
15
14
13
12
A
EN
(1)
B
(1) EN is the internal enable signal applied to the switch.
Charge
Pump
V
CC
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
LOGIC DIAGRAM (POSITIVE LOGIC)
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
3
www.ti.com
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
V
CC
V
IN
V
I/O
I
IK
I
I/OK
I
I/O
θ
JA
T
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
(2) All voltages are with respect to ground unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VIand VOare used to denote specific conditions for V
(5) IIand IOare used to denote specific conditions for I
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
(7) The package thermal impedance is calculated in accordance with JESD 51-5.
Supply voltage range –0.5 4.6 V
Control input voltage range
Switch I/O voltage range
Control input clamp current VIN< 0 –50 mA
I/O port clamp current V
ON-state switch current
Continuous current through V
Package thermal impedance °C/W
Storage temperature range –65 150 °C
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1)
MIN MAX UNIT
(2) (3)
(2) (3) (4)
< 0 –50 mA
(5)
or GND ±100 mA
CC
.
I/O
.
I/O
I/O
DBQ package
DGV package
PW package
RGY package
(6)
(6)
(6)
(7)
–0.5 7 V
–0.5 7 V
±64 mA
90
120
108
39
Recommended Operating Conditions
V
V
V
V
T
Supply voltage 2.3 3.6 V
CC
High-level control input voltage V
IH
Low-level control input voltage V
IL
Data input/output voltage 0 5.5 V
I/O
Operating free-air temperature –40 85 °C
A
(1)
(1) All unused control inputs of the device must be held at V
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
MIN MAX UNIT
V
= 2.3 V to 2.7 V 1.7 5.5
CC
V
= 2.7 V to 3.6 V 2 5.5
CC
V
= 2.3 V to 2.7 V 0 0.7
CC
V
= 2.7 V to 3.6 V 0 0.8
CC
or GND to ensure proper device operation. Refer to the TI application report,
CC
4
www.ti.com
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
V
IK
I
IN
I
OZ
I
off
I
CC
∆ I
CC
I
CCD
C
in
C
io(OFF)
C
io(ON)
(6)
r
on
(1) VINand IINrefer to control inputs. VI, VO, II, and IOrefer to data pins.
(2) All typical values are at V
(3) For I/O ports, the parameter IOZincludes the input leakage current.
(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
(5) This parameter specifies the dynamic power-supply current associated with the operating frequency of a single control input (see
(6) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
Control inputs V
(3)
(4)
Control inputs V
Per control Control input switching at mA/
(5)
input 50% duty cycle MHz
Control inputs V
A port V
B port V
Figure 2 ).
determined by the lower of the voltages of the two (A or B) terminals.
(1)
(2)
V
= 3.6 V, II= –18 mA –1.8 V
CC
= 3.6 V, VIN= 0 to 5.5 V ±1 µ A
CC
V
= 3.6 V, ±1 µ A
CC
V
= 0, VO= 0 to 5.5 V, VI= 0 1 µ A
CC
V
= 3.6 V, VIN= V
CC
= 3.6 V, One input at 3 V, Other inputs at V
CC
V
= 3.6 V, A and B ports open, 0.03 0.1
CC
= 3.3 V, VIN= 5.5 V, 3.3 V, or 0 2.5 4.5 pF
CC
= 3.3 V, V
CC
= 3.3 V, V
CC
V
= 3.3 V, V
CC
V
= 2.3 V,
CC
TYP at V
V
CC
CC
= 2.5 V
CC
= 3 V
= 3.3 V (unless otherwise noted), TA= 25°C.
VO= 0 to 5.5 V, Switch OFF,
VI= 0, VIN= V
I
= 0,
I/O
Switch ON or OFF,
Switch OFF,
VIN= V
Switch OFF,
VIN= V
Switch ON,
VIN= V
or GND,
CC
or GND,
CC
or GND,
CC
I/O
I/O
I/O
or GND
CC
or GND 1 4 mA
CC
or GND 30 µ A
CC
= 5.5 V, 3.3 V, or 0 19.5 25
= 5.5 V, 3.3 V, or 0 3.5 4.5
= 5.5 V, 3.3 V, or 0 15 19 pF
VI= 0, IO= 30 mA 4 10
VI= 1.7 V, IO= –15 mA 4.5 11
VI= 0, IO= 30 mA 3.5 8
VI= 2.4 V, IO= –15 mA 4 10
or GND.
CC
MAX UNIT
pF
Ω
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3 )
V
= 2.5 V V
PARAMETER UNIT
(1)
fOEor f
S
(2)
t
pd
t
pd(s)
t
en
t
dis
(1) Maximum switching frequency for control input (V
(2) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
FROM TO
(INPUT) (OUTPUT)
OE or S A or B 10 20 MHz
A or B B or A 0.12 0.18 ns
S A 1.5 6.7 1.5 5.9 ns
S B 1.5 6.7 1.5 5.9
OE A or B 1.5 6.7 1.5 5.9
S B 0.5 6.1 0.5 6.1
OE A or B 0.5 6.1 0.5 6.1
> VCC, VI= 5 V, RL≥ 1 M Ω , CL= 0).
O
CC
± 0.2 V ± 0.3 V
MIN MAX MIN MAX
capacitance, when driven by an ideal voltage source (zero output impedance).
CC
= 3.3 V
ns
ns
5
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0
2
4
6
8
10
12
14
16
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VI − V
TYPICAL r
on
vs
V
I
V
CC
= 3.3 V
TA = 25°C
IO = −15 mA
r
on
− ON-State Resistance − Ω
OE or S Switching Frequency − MHz
TYPICAL ICC
vs
CONTROL INPUT SWITCHING FREQUENCY
0
0.5
1
1.5
2
2.5
3
0 5
10 15 20 25
VCC = 3.3 V
TA = 25°C
A and B Ports Open
S Switching
OE Switching
I
CC
− mA
SN74CB3Q3251
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
Figure 1. Typical ronvs VI, V
= 3.3 V and IO= –15 mA
CC
Figure 2. Typical ICCvs OE or S Switching Frequency, V
= 3.3 V
CC
6
www.ti.com
V
OH
V
OL
C
L
(see Note A)
TEST CIRCUIT
S1
2 × V
CC
Open
GND
R
L
R
L
t
PLH
t
PHL
Output
Waveform 1
S1 at 2 × V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t
PZL
t
PZH
t
PLZ
t
PHZ
V
CC
0 V
V
OH
V
OL
0 V
VOL + V
∆
VOH − V
∆
0 V
Output
Control
(VIN)
V
CC
V
CC
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (t
pd(s)
)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as ten.
G. t
PLH
and t
PHL
are the same as t
pd(s)
. The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance
of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
50 Ω
V
G1
V
CC
DUT
50 Ω
V
IN
50 Ω
V
G2
50 Ω
V
I
TEST
R
L
S1 V
∆
C
L
2.5 V ± 0.2 V
3.3 V ± 0.3 V
V
CC
V
I
t
PHZ/tPZH
t
PLZ/tPZL
t
pd(s)
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
Open
Open
2 × V
CC
2 × V
CC
GND
GND
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
VCC or GND
VCC or GND
GND
GND
V
CC
V
CC
30 pF
50 pF
30 pF
50 pF
30 pF
50 pF
0.15 V
0.3 V
0.15 V
0.3 V
Output
Control
(VIN)
Input Generator
Input Generator
VCC/2 VCC/2
VCC/2 VCC/2
VCC/2 VCC/2
VCC/2
VCC/2
V
O
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
PARAMETER MEASUREMENT INFORMATION
1-OF-8 FET MULTIPLEXER/DEMULTIPLEXER
SN74CB3Q3251
SCDS173A – AUGUST 2004 – REVISED MARCH 2005
Figure 3. Test Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device Status
SN74CB3Q3251DBQR ACTIVE SSOP/
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
DBQ 16 2500 Pb-Free
QSOP
SN74CB3Q3251DGVR ACTIVE TVSOP DGV 16 2000 Pb-Free
SN74CB3Q3251PW ACTIVE TSSOP PW 16 90 Pb-Free
SN74CB3Q3251PWR ACTIVE TSSOP PW 16 2000 Pb-Free
SN74CB3Q3251RGYR PREVIEW QFN RGY 16 1000 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
CU NIPDAU Level-1-250C-UNLIM
CU NIPDAU Level-1-250C-UNLIM
CU NIPDAU Level-1-250C-UNLIM
(3)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
24
112
A
0,23
0,13
13
0,07
4,50
4,30
M
6,60
6,20
0,16 NOM
Gage Plane
0,25
0°–8°
0,75
0,50
1,20 MAX
PINS **
DIM
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
0,15
0,05
14
3,70
3,50
Seating Plane
3,50
20
5,10
4,90
0,08
5,103,70
4,90
382416
7,90
7,70
48
9,80
9,60
56
11,40
11,20
4073251/E 08/00
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65
1,20 MAX
14
0,30
0,19
8
4,50
4,30
PINS **
7
Seating Plane
0,15
0,05
8
1
A
DIM
14
0,10
6,60
6,20
0,10
M
0,15 NOM
Gage Plane
0,25
0°–8°
2016
24
28
0,75
0,50
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4040064/F 01/97
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Mailing Address: Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
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