Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Standard Plastic and Ceramic 300-mil DIPs
(J, N)
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
The ′BCT760 is organized as two 4-bit buffers/line
drivers with separate output-enable (OE) inputs.
When OE
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
The SN54BCT760 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74BCT760 is characterized for
operation from 0°C to 70°C.
is low, the device passes data from the
SN54BCT760 ...J OR W PACKAGE
SN74BCT760 . . . DW OR N PACKAGE
SN54BCT760 . . . FK PACKAGE
1A2
2Y3
1A3
2Y2
1A4
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
3 2 1 20 19
4
5
6
7
8
9 10 11 12 13
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
(TOP VIEW)
1A1
GND
V
1OE
2A1
2Y4
2Y1
CC
1Y4
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
18
17
16
15
14
2A22OE
1Y1
2A4
1Y2
2A3
1Y3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
FUNCTION TABLE
(each buffer)
INPUTS
OEA
LHH
LLL
HXH
OUTPUT
Y
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–1
SN54BCT760, SN74BCT760
OCTAL BUFFERS/DRIVERS
WITH OPEN-COLLECTOR OUTPUTS
SCBS034B – JULY 1989 – REVISED NOVEMBER 1993
1
2
4
6
8
19
11
13
15
17
†
EN
EN
logic symbol
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
2A3
2A4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
18
16
14
12
logic diagram (positive logic)
1OE
1Y1
1Y2
1Y3
1Y4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
1A1
1A2
1A3
1A4
2OE
2A1
2A2
1
2
4
6
8
19
11
13
18
16
14
12
1Y1
1Y2
1Y3
1Y4
9
2Y1
7
2Y2
2A3
2A4
15
17
5
2Y3
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input current range, I
Voltage range applied to any output in the disabled or power-off state, V
Voltage range applied to any output in the high state, VO – 0.5 V to V
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The negative input voltage rating may be exceeded if the input clamp current rating is observed.
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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