MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
• Bus Transceivers/Registers
• Independent Registers and Enables for
A and B Buses
• Multiplexed Real-Time and Stored Data
• Power-Up High-Impedance Mode
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic and Ceramic 300-mil DIPs (JT, NT)
description
These devices consist of bus transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
input bus or from the internal registers. Data on the
A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the
four fundamental bus-management functions that
can be performed with the ′BCT646.
Output-enable (OE
inputs are provided to control the transceiver
functions. In the transceiver mode, data present at
the high-impedance port may be stored in either
register or in both.
The select-control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode)
data. The direction control (DIR) determines which bus will receive data when OE
(OE high), A data may be stored in one register and/or B data may be stored in the other register.
) and direction-control (DIR)
CLKAB
SAB
GND
SN54BCT646 . . . FK PACKAGE
A1
A2
A3
NC
A4
A5
A6
NC – No internal connection
1
2
DIR
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10
A8
11
12
(TOP VIEW)
DIR
SAB
CLKAB
432128
5
6
7
8
9
10
11
12 13 14 15 16
A8
A7
GND
24
23
22
21
20
19
18
17
16
15
14
13
NC
NC
is low. In the isolation mode
CC
V
27 26
17 18
B8
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
CLKBA
SBA
25
24
23
22
21
20
19
B7
B6
OE
B1
B2
NC
B3
B4
B5
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The SN54BCT646 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74BCT646 is characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1993, Texas Instruments Incorporated
2–1
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
21
OE
L
BUS A
3
DIR
L
BUS A
1
CLKAB
REAL-TIME TRANSFER
BUS B TO BUS A
CLKBA
X
23
BUS B
22
2
SAB
X
SBA
X
L
BUS B
21
OE
BUS A
3
DIR
L
H
BUS A
1
CLKAB
X
REAL-TIME TRANSFER
BUS A TO BUS B
23
CLKBA
X
2
SAB
L
BUS B
22
SBA
X
BUS B
21
X
X
H
3
DIR
X
X
X
1
CLKAB23CLKBA
↑
XX
STORAGE FROM
A, B, OR A AND B
2
22
SAB
X
↑
↑↑
SBA
X
X
X
X
X
Figure 1. Bus-Management Functions
Pin numbers shown are for the DW, JT, NT, and W packages.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
21
OEOE
L
LH L XHX
3
DIR
L
1
CLKAB
X
TRANSFER STORED DA TA
TO A AND/OR B
23
CLKBA
L
2
SAB
X
22
SBA
H
SN54BCT646, SN74BCT646
OPERATION OR FUNCTION
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
FUNCTION TABLE
INPUTS
OEDIRCLKABCLKBASABSBAA1 THRU A8B1 THRU B8
XX↑XXXInputUnspecified
XXX ↑XXUnspecified
HX↑↑XXInputInputStore A and B data
HXH or LH or LXXInput disabledInput disabledIsolation, hold storage
LLXXXLOutputInputReal-time B data to A bus
LLXH or LXHOutputInputStored B data to A bus
LHXXLXInputOutputReal-time A data to B bus
LHH or LXHXInputOutputStored A data to B bus
†
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every low-to-high transition of the clock inputs.
DATA I/O
†
†
InputStore B, A unspecified
Store A, B unspecified
†
†
logic symbol
‡
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, NT, and W packages.
‡
OE
DIR
CLKBA
SBA
CLKAB
SAB
A1
A2
A3
A4
A5
A6
A7
A8
21
3
23
22
1
2
4
5
6
7
8
9
10
11
G3
3 EN1 [BA]
3 EN2 [AB]
C4
G5
C6
G7
5
≥1
1
5
7
6D≥1
7
1
4D
1
2
20
19
18
17
16
15
14
13
B1
B2
B3
B4
B5
B6
B7
B8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–3
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
logic diagram (positive logic)
21
OE
3
DIR
SBA
SAB
23
22
1
2
One of Eight
Channels
CLKBA
CLKAB
1D
C1
4
A1
1D
C1
Pin numbers shown are for the DW, JT, NT, and W packages.
To Seven Other Channels
20
B1
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
UNIT
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range: Control inputs (see Note 1)– 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54BCT646SN74BCT646
MINTYP†MAXMINTYP†MAX
V
IK
V
OH
I
IH
IL
I
OS
I
CCL
I
CCH
I
CCZ
C
i
C
io
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
For I/O ports, the parameters IIH and IIL include the off-state output current.
§
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
A or B port
Control inputs
A or B port
Control inputs
A or B port
Control inputs
§
A or B portVCC = 5.5 V,VI = GND42674267mA
A or B portVCC = 5.5 V,VI = 4.5 V5.695.69mA
A or B portVCC = 5.5 V,VI = GND10161016mA
Control inputsVCC = 5 V,VI = 2.5 V or 0.5 V66pF
A or B portVCC = 5 V,VO = 2.5 V or 0.5 V1214pF
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
f
clock
t
w
t
su
t
h
VCC = 5 V,
TA = 25°C
MINMAXMINMAXMINMAX
Clock frequency083083083MHz
Pulse duration, CLK high or low666ns
Setup time, A or B before CLKAB↑ or CLKBA↑676ns
Hold time, A or B after CLKAB↑ or CLKBA↑0.50.50.5ns
SN54BCT646SN7BCTT646
UNIT
2–6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
(INPUT)
(OUTPUT)
CLKBA or CLKAB
A or B
ns
A or B
B or A
ns
†
A or B
ns
†
A or B
ns
OE
A or B
ns
OE
A or B
ns
DIR
A or B
ns
DIR
A or B
ns
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
PARAMETER
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
†
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
PLZ
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
= 50 pF (unless otherwise noted) (see Note 2)
L
FROM
SAB or SBA
(with A or B high)
SAB or SBA
(with A or B low)
TO
VCC = 5 V,
TA = 25°C
MINTYPMAXMINMAXMINMAX
838383MHz
3.679.43.612.43.611.2
3.979.23.911.53.910.6
3.168.13.111.13.19.5
3.76.88.93.712.13.710.5
4.58.811.24.515.24.513.8
3.368.13.39.83.39.1
3.97.710.23.913.33.912
4.78.310.84.713.74.712.9
47.910.7414413.2
4.68.811.84.615.44.614.4
47.29.4412410.9
3.479.33.411.63.410.5
2.87.810.72.8142.813.1
3.88.911.93.815.63.814.6
3.88.410.73.813.23.812.6
3.27.39.93.212.63.211.8
SN54BCT646SN74BCT646
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–7
SN54BCT646, SN74BCT646OCTAL BUS TRANSCEIVERS AND REGISTERSWITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
2–8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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