Texas Instruments SN74BCT541ADW, SN74BCT541ADWR, SN74BCT541AN, SNJ54BCT541FK, SNJ54BCT541J Datasheet

SN54BCT541, SN74BCT541A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS011D – JULY 1988 – REVISED SEPTEMBER 1994

• State-of-the-Art BiCMOS Design

Significantly Reduces I

CCZ

• 3-State Outputs Drive Bus Lines or Buffer

Memory-Address Registers

• P-N-P Inputs Reduce DC Loading

• Data Flow-Through Pinout (All Inputs on

Opposite Side From Outputs)

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic (N) and Ceramic (J) 300-mil DIPs

description

The SN54BCT541 and SN74BCT541A octal
buffers and line drivers are ideal for driving bus
lines or buffering memory-address registers. The
devices feature inputs and outputs on opposite
sides of the package to facilitate printed-circuit­board layout.

The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1

or OE2) input is high, all eight outputs are in

the high-impedance state.
The SN54BCT541 is characterized for operation

over the full military temperature range of –55°C
to 125°C. The SN74BCT541A is characterized for
operation from 0°C to 70°C.

SN54BCT541 ...J OR W PACKAGE

SN74BCT541A . . . DW OR N PACKAGE

SN54BCT541 . . . FK PACKAGE

A3
A4
A5
A6
A7

(TOP VIEW)

OE1

1

A1

2

A2

3

A3

4

A4

5
6

A5

7

A6

8

A7

9

A8

GND

10

(TOP VIEW)

A2A1OE1

3212019

4
5
6
7
8

9 10 11 12 13

A8

Y8

20
19
18
17
16
15
14
13
12
11

V

Y7

CC

V

CC

OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

18
17
16
15
14

Y6 OE2

Y1
Y2
Y3
Y4
Y5

GND

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

FUNCTION TABLE

INPUTS

OE1 OE2 A

L L L L

L LH H
H XX Z
X H X Z

OUTPUT

Y

Copyright  1994, Texas Instruments Incorporated

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

SN54BCT541, SN74BCT541A

UNIT

OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCBS011D – JULY 1988 – REVISED SEPTEMBER 1994

1
19

2
3
4
5
6
7
8
9

†

&

EN

1

18
17
16
15
14
13
12
11

logic diagram (positive logic)

OE1
OE2

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

1
19

2

A1 Y1

18

To Seven Other Channels

logic symbol

OE1
OE2

A1
A2
A3
A4
A5
A6
A7
A8

†

This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

CC

Input voltage range, VI (see Note 1) – 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the disabled or power-off state, V
Voltage range applied to any output in the high state, V

– 0.5 V to V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

O

Current into any output in the low state: SN54BCT541 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74BCT541A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, TA: SN54BCT541 – 55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74BCT541A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range – 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

– 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

– 0.5 V to 5.5 V. . . . . . . . . . . . . . .

‡

CC

recommended operating conditions

2

V
V
V
I
I
I
T

CC
IH

IL
IK
OH
OL

A

Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
Input clamp current –18 –18 mA
High-level output current –12 –15 mA
Low-level output current 48 64 mA
Operating free-air temperature –55 125 0 70 °C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN54BCT541 SN74BCT541A

MIN NOM MAX MIN NOM MAX

SN54BCT541, SN74BCT541A

PARAMETER

TEST CONDITIONS

UNIT

V

V

V

V

A

Y

ns

OE

Y

ns

OE

Y

ns

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS011D – JULY 1988 – REVISED SEPTEMBER 1994

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54BCT541 SN74BCT541A

MIN TYP†MAX MIN TYP†MAX

V

IK

V

OH

OL

I

I

I

IH

I

IL

I

OZH

I

OZL

‡

I

OS

I

CCH

I

CCL

I

CCZ

C

i

C

†

All typical values are at VCC = 5 V, TA = 25°C.

‡

Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

o

VCC = 4.5 V, II = –18 mA –1.2 –1.2 V

IOH = –3 mA 2.4 3.3 2.4 3.3

VCC = 4.5 V

= 4.5

CC

VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.5 V –0.6 –0.6 mA
VCC = 5.5 V, VO = 2.7 V 50 50 µA
VCC = 5.5 V, VO = 0.5 V –50 –50 µA
VCC = 5.5 V, VO = 0 –100 –225 –100 –225 mA
VCC = 5.5 V 27 40 27 40 mA
VCC = 5.5 V 47 72 47 72 mA
VCC = 5.5 V 5 7 5 7 mA
VCC = 5 V, VI = 2.5 V or 0.5 V 5 5 pF
VCC = 5 V, VO = 2.5 V or 0.5 V 10 10 pF

IOH = –12 mA 2 3.2
IOH = –15 mA 2 3.1
IOL = 48 mA 0.38 0.55
IOL = 64 mA 0.42 0.55

V

switching characteristics (see Figure 1)

VCC = 5 V,
CL = 50 pF,

PARAMETER

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

§

PLZ

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

FROM

(INPUT)

TO

(OUTPUT)

R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C

′BCT541 SN54BCT541 SN74BCT541A

MIN TYP MAX MIN MAX MIN MAX

2.1 3.7 5.3 1.7 6.3 1.7 6

3.7 5.5 7.5 3.2 8.7 3.4 8.2

4.5 7.2 9.3 4.4 11 3.9 10.7
5 8 10.4 5.4 12.4 4.4 11.5

3.5 5.6 7.6 3 9.1 3 8.6

3.4 5.2 7.2 3 9.4 3 8.6

VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX

§

UNIT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

SN54BCT541, SN74BCT541A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCBS011D – JULY 1988 – REVISED SEPTEMBER 1994

PARAMETER MEASUREMENT INFORMATION

7 V (t

S1

From Output

Under Test

C

(see Note A)

3-STATE AND OPEN-COLLECTOR OUTPUTS

Timing Input

(see Note B)

Data Input

(see Note B)

L

LOAD CIRCUIT FOR

t

su

1.5 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

, t

PZL
Open

(all others)

R1

1.5 V

, O.C.)

PLZ

Test
Point

R2

RL = R1 = R2

t

h

1.5 V

3 V

0 V

3 V

0 V

From Output

Under Test

(see Note A)

High-Level

Pulse

(see Note B)

Low-Level

Pulse

C

L

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

1.5 V

t

w

1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

R1

Test
Point

3 V

1.5 V
0 V

3 V

1.5 V
0 V

Input

(see Note B)

t

In-Phase

(see Note D)

Out-of-Phase

(see Note D)

NOTES: A. CL includes probe and jig capacitance.

PLH

Output

t

PHL

Output

PROPAGATION DELAY TIMES (see Note D)

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf≤ 2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.

1.5 V 1.5 V

1.5 V1.5 V

1.5 V 1.5 V

VOLTAGE WAVEFORMS

Figure 1. Load Circuits and Voltage Waveforms

t

PHL

t

PLH

3 V

0 V

V

V

V

V

OH

(see Notes C and D)

OL

OH

(see Notes C and D)

OL

Output

Control

(low-level enable)

Waveform 1

Waveform 2

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

t

PZL

1.5 V

t

PZH

1.5 V

VOLTAGE WAVEFORMS

t

PHZ

3 V

1.5 V1.5 V
0 V

t

PLZ

3.5 V

V

OL

0.3 V

V

OH

0.3 V
0 V

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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Copyright  1998, Texas Instruments Incorporated