Datasheet SN74BCT540ADW, SN74BCT540ADWR, SN74BCT540AN, SNJ54BCT540FK, SNJ54BCT540J Datasheet (Texas Instruments)

SN54BCT540, SN74BCT540A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994

Copyright  1994, Texas Instruments Incorporated

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

• State-of-the-Art BiCMOS Design

Significantly Reduces I

CCZ

• 3-State Outputs Drive Bus Lines or Buffer

Memory-Address Registers

• P-N-P Inputs Reduce DC Loading

• Data Flow-Through Pinout (All Inputs on

Opposite Side From Outputs)

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic (N) and Ceramic (J) 300-mil DIPs

description

The SN54BCT540 and SN74BCT540A octal
buffers and line drivers are ideal for driving bus
lines or buffer memory-address registers. The
devices feature inputs and outputs on opposite
sides of the package that facilitate printed-circuit­board layout.

The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1

or OE2) input is high, all corresponding

outputs are in the high-impedance state.
The SN54BCT540 is characterized for operation

over the full military temperature range of –55°C
to 125°C. The SN74BCT540A is characterized for
operation from 0°C to 70°C.

FUNCTION TABLE

INPUTS

OUTPUT

OE1 OE2 A

OUTPUT

Y

L L L H
L LH L
H XX Z
X H X Z

SN54BCT540 ...J OR W PACKAGE

SN74BCT540A ... DW OR N PACKAGE

(TOP VIEW)

SN54BCT540 . . . FK PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

OE1

A1
A2
A3
A4
A5
A6
A7
A8

GND

V

CC

OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

3212019

910111213

4
5
6
7
8

18
17
16
15
14

Y1
Y2
Y3
Y4
Y5

A3
A4
A5
A6
A7

A2A1OE1

Y7

Y6 OE2

A8

GND

Y8

V

CC

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic symbol

†

logic diagram (positive logic)

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

Y1

18

Y2

17

Y3

16

Y4

15

Y5

14

Y6

13

Y7

12

Y8

11

1

19

OE1

OE2

EN

&

1
19

OE1
OE2

A1

2

18

Y1

To Seven Other Channels

1

†

This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

‡

Supply voltage range, V

CC

– 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) – 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the disabled or power-off state, V

O

– 0.5 V to 5.5 V. . . . . . . . . . . . . . .

Voltage range applied to any output in the high state, VO – 0.5 V to V

CC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current into any output in the low state: SN54BCT540 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74BCT540A 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

A

: SN54BCT540 – 55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74BCT540A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range – 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

recommended operating conditions

SN54BCT540 SN74BCT540A

MIN NOM MAX MIN NOM MAX

UNIT

V

CC

Supply voltage 4.5 5 5.5 4.5 5 5.5 V

V

IH

High-level input voltage 2 2 V

V

IL

Low-level input voltage 0.8 0.8 V

I

IK

Input clamp current –18 –18 mA

I

OH

High-level output current –12 –15 mA

I

OL

Low-level output current 48 64 mA

T

A

Operating free-air temperature –55 125 0 70 °C

SN54BCT540, SN74BCT540A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

SN54BCT540 SN74BCT540A

PARAMETER

TEST CONDITIONS

MIN TYP†MAX MIN TYP†MAX

UNIT

V

IK

VCC = 4.5 V, II = –18 mA –1.2 –1.2 V

IOH = –3 mA 2.4 3.3 2.4 3.3

V

OH

VCC = 4.5 V

IOH = –12 mA 2 3.2

V
IOH = –15 mA 2 3.1
IOL = 48 mA 0.38 0.55

V

OL

V

CC

= 4.5

V

IOL = 64 mA 0.42 0.55

V

I

I

VCC = 5.5 V, VI = 7 V 0.1 0.1 mA

I

IH

VCC = 5.5 V, VI = 2.7 V 20 20 µA

I

IL

VCC = 5.5 V, VI = 0.5 V –0.6 –0.6 mA

I

OZH

VCC = 5.5 V, VO = 2.7 V 50 50 µA

I

OZL

VCC = 5.5 V, VO = 0.5 V –50 –50 µA

I

OS

‡

VCC = 5.5 V, VO = 0 –100 –225 –100 –225 mA

I

CCH

VCC = 5.5 V 20 30 20 30 mA

I

CCL

VCC = 5.5 V 45 71 45 71 mA

I

CCZ

VCC = 5.5 V 3 6 3 6 mA

C

i

VCC = 5 V, VI = 2.5 V or 0.5 V 6 5 pF

C

o

VCC = 5 V, VO = 2.5 V or 0.5 V 10 10 pF

†

All typical values are at VCC = 5 V, TA = 25°C.

‡

Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

switching characteristics (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = 25°C

VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX

§

UNIT

′BCT540 SN54BCT540 SN74BCT540A

MIN TYP MAX MIN MAX MIN MAX

t

PLH

2.5 4.1 5.8 1.9 7.2 2 6.9

t

PHL

A

Y

0.6 1.9 3.5 0.3 4.5 0.3 4

ns

t

PZH

4 6.8 8.9 4.1 10.4 3.3 10.1

t

PZL

OE

Y

5 8 10 5.3 11.8 4.3 11.3

ns

t

PHZ

3.5 5.7 7.8 2.7 9.4 2.7 9

t

PLZ

OE

Y

3.8 5.5 7.4 3.5 8.9 3.5 8.5

ns

§

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

SN54BCT540, SN74BCT540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS

SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

Test
Point

R1

C

L

(see Note A)

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

LOAD CIRCUIT FOR

3-STATE AND OPEN-COLLECTOR OUTPUTS

R1

S1

7 V (t

PZL

, t

PLZ

, O.C.)

Open
(all others)

From Output

Under Test

Test
Point

R2

C

L

(see Note A)

RL = R1 = R2

1.5 V

1.5 V

1.5 V

3 V

3 V

0 V

0 V

t

h

t

su

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing Input

(see Note B)

Data Input

(see Note B)

1.5 V

1.5 V

3 V

3 V

0 V

0 V

High-Level

Pulse

(see Note B)

Low-Level

Pulse

t

w

VOLTAGE WAVEFORMS

PULSE DURATION

1.5 V

1.5 V

t

PHL

t

PLH

t

PLH

t

PHL

Input

(see Note B)

Out-of-Phase

Output

(see Note D)

1.5 V 1.5 V

1.5 V1.5 V

1.5 V 1.5 V

3 V

0 V

V

OL

V

OH

V

OH

V

OL

In-Phase

Output

(see Note D)

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES (see Note D)

t

PHZ

t

PLZ

0.3 V

t

PZL

t

PZH

1.5 V1.5 V

1.5 V

1.5 V

3 V

0 V

Output

Control

(low-level enable)

Waveform 1

(see Notes C and D)

Waveform 2

(see Notes C and D)

0 V

V

OH

V

OL

3.5 V

0.3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf≤ 2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.

Figure 1. Load Circuits and Voltage Waveforms

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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
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Copyright  1998, Texas Instruments Incorporated