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SN54BCT2827C, SN74BCT2827C
10-BIT BUS/MOS MEMORY DRIVERS
WITH 3-STATE OUTPUTS
SCBS007E – APRIL 1987 – REVISED NOVEMBER 1993
• BiCMOS Design Substantially Reduces I
• Output Ports Have Equivalent 25-Ω
Resistors; No External Resistors Are
Required
• Specifically Designed to Drive MOS DRAMs
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• Flow-Through Architecture Optimizes
PCB Layout
• Power-Up High-Impedance State
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Standard Plastic and Ceramic 300-mil DIPs
(JT, NT)
description
These 10-bit buffers and bus drivers are
specifically designed to drive the capacitive input
characteristics of MOS DRAMs. They provide
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with
active-low inputs so if either output-enable (OE1
or OE2) input is high, all ten outputs are in the
high-impedance state. The outputs are also in the
high-impedance state during power-up and
power-down conditions. The outputs remain in the
high-impedance state while the device is powered
down.
CCZ
SN54BCT2827C . . . JT OR W PACKAGE
SN74BCT2827C . . . DW OR NT PACKAGE
SN54BCT2827C . . . FK PACKAGE
A3
A4
A5
NC
A6
A7
A8
NC-No internal connection
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
A2A1OE1
4
321
5
6
7
8
9
10
11
13 14
12
A9
(TOP VIEW)
24
1
23
2
22
3
21
4
20
5
19
6
18
7
17
8
16
9
15
10
14
11
13
12
(TOP VIEW)
NC
28 27 26
15 16 17 18
NC
A10
GND
CC
V
OE2
V
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
Y1
Y10
CC
Y2
25
24
23
22
21
20
19
Y9
Y3
Y4
Y5
NC
Y6
Y7
Y8
The SN54BCT2827C is characterized for operation over the full military temperature range of
–55°C to 125°C. The SN74BCT2827C is
characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OE1 OE2 A
L L L L
L LH H
H XX Z
X H X Z
OUTPUT
Y
Copyright 1993, Texas Instruments Incorporated
2–1
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SN54BCT2827C, SN74BCT2827C
10-BIT BUS/MOS MEMORY DRIVERS
WITH 3-STATE OUTPUTS
SCBS007E – APRIL 1987 – REVISED NOVEMBER 1993
1
13
2
3
4
5
6
7
8
9
10
11
†
&
EN
1
23
22
21
20
19
18
17
16
15
14
logic symbol
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, NT, and W packages.
schematic of each output
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
logic diagram (positive logic)
1
OE1
13
OE2
223
A1
To Nine Other Channels
Y1
V
CC
GND
Output
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265