TEXAS INSTRUMENTS SN74AVCH245 Technical data
SN74AVCH245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES264D – APRIL 1999 – REVISED FEBRUARY 2000
D
DOC
(Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without
Speed Degradation
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Less Than 2-ns Maximum Propagation
Delay at 2.5-V and 3.3-V V
D
Dynamic Drive Capability Is Equivalent to
CC
Standard Outputs With IOH and IOL of
±24 mA at 2.5-V V
CC
description
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1
shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports,
Logic Family T echnology and Applications
Circuitry Technology and Applications
, literature number SCEA006, and
, literature number SCEA009.
D
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D
I
Supports Partial-Power-Down Mode
off
Operation
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Package Options Include Plastic
Small-Outline (DW), Thin Very
Small-Outline (DGV), and Thin Shrink
Small-Outline (PW) Packages
Dynamic Output Control (DOC)
AVC
3.2
2.8
2.4
2.0
1.6
1.2
– Output Voltage – V
OL
0.8
V
0.4
TA = 25°C
Process = Nominal
VCC = 1.8 V
IOL – Output Current – mA
VCC = 2.5 V
VCC = 3.3 V
136
17015311910285685134170
2.8
2.4
2.0
1.6
1.2
– Output Voltage – V
OH
0.8
V
0.4
TA = 25°C
Process = Nominal
VCC = 3.3 V
–128–144–160
IOH – Output Current – mA
VCC = 2.5 V
VCC = 1.8 V
–80–96–112 –32–48–64 0–16
Figure 1. Output Voltage vs Output Current
This octal bus transceiver is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V
VCC operation.
The SN74A VCH245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE
) input can be used to disable the device so that the buses are effectively isolated.
PRODUCT PREVIEW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 2000, Texas Instruments Incorporated
1
SN74AVCH245
OPERATION
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES264D – APRIL 1999 – REVISED FEBRUARY 2000
description (continued)
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
This device is fully specified for partial-power-down applications using I
preventing damaging current backflow through the device when it is powered down.
The SN74AVCH245 is characterized for operation from –40°C to 85°C.
terminal assignments
PRODUCT PREVIEW
DGV, DW, OR PW PACKAGE
OE DIR
H X Isolation
(TOP VIEW)
1
20
19
18
17
16
15
14
13
12
11
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
CC
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
GND
INPUTS
L L B data to A bus
L H A data to B bus
10
FUNCTION TABLE
(each transceiver)
off
. The I
circuitry disables the outputs,
off
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AVCH245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES264D – APRIL 1999 – REVISED FEBRUARY 2000
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
19
1
2
3
4
5
6
7
8
9
G3
3 EN1 [BA]
3 EN2 [AB]
1
2
logic diagram (positive logic)
1
DIR
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
A1
19
OE
2
18
B1
PRODUCT PREVIEW
To Seven Other Channels
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3
SN74AVCH245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES264D – APRIL 1999 – REVISED FEBRUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: Except I/O ports (see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (see Notes 1 and 2) –0.5 V to V
Voltage range applied to any input/output when the output
is in the high-impedance or power-off state, V
(see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . .
O
Voltage range applied to any input/output when the output
is in the high or low state, V
Input clamp current, I
IK
(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through each VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 3): DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . .
†
PRODUCT PREVIEW
4
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