FEATURES
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
• Member of the Texas Instruments Widebus™
Family
• Operates From 1.65 V to 3.6 V
• Max tpdof 4.2 ns at 3.3 V
• ± 12-mA Output Drive at 3.3 V
• All Outputs Have Equivalent 26- Ω Series
Resistors, So No External Resistors Are
Required
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver is
designed for 1.65-V to 3.6-V V
The SN74ALVCHR16245 is designed for
asynchronous communication between data buses.
The control-function implementation minimizes
external timing requirements.
This device can be used as two 8-bit transceivers or
one 16-bit transceiver. It allows data transmission
from the A bus to the B bus or from the B bus to the
A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable ( OE)
input can be used to disable the device so that the
buses are effectively isolated.
All outputs, which are designed to sink up to 12 mA, include equivalent 26- Ω series resistors to reduce overshoot
and undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
-40 ° C to 85 ° C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G – DECEMBER 1995 – REVISED OCTOBER 2004
operation.
CC
T
A
SSOP - DL Tape and reel SN74ALVCHR16245LR ALVCHR16245
TSSOP - DGG Tape and reel SN74ALVCHR16245GR ALVCHR16245
VFBGA - GQL SN74ALVCHR16245KR
VFBGA - ZQL (Pb-free) 74ALVCHR16245ZQLR
PACKAGE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ORDERING INFORMATION
(1)
Tape and reel VR245
ORDERABLE PART NUMBER TOP-SIDE MARKING
Copyright © 1995–2004, Texas Instruments Incorporated
SN74ALVCHR16245
through a pullup
CC
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
K
SN74ALVCHR16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G – DECEMBER 1995 – REVISED OCTOBER 2004
TERMINAL ASSIGNMENTS
1 2 3 4 5 6
A 1DIR NC NC NC NC 1 OE
B 1B2 1B1 GND GND 1A1 1A2
C 1B4 1B3 V
D 1B6 1B5 GND GND 1A5 1A6
E 1B8 1B7 1A7 1A8
F 2B1 2B2 2A2 2A1
G 2B3 2B4 GND GND 2A4 2A3
H 2B5 2B6 V
J 2B7 2B8 GND GND 2A8 2A7
K 2DIR NC NC NC NC 2 OE
(1) NC - No internal connection
CC
CC
(1)
V
CC
V
CC
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation
OPERATION
1A3 1A4
2A6 2A5
2
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Pin numbers shown are for the DGG and DL packages.
LOGIC DIAGRAM (POSITIVE LOGIC)
SN74ALVCHR16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G – DECEMBER 1995 – REVISED OCTOBER 2004
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
V
V
I
I
I
θ
T
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Supply voltage range -0.5 4.6 V
CC
Input voltage range V
I
Output voltage range
O
Input clamp current VI< 0 -50 mA
IK
Output clamp current VO< 0 -50 mA
OK
Continuous output current ± 50 mA
O
Continuous current through each V
(2) (3)
or GND ± 100 mA
CC
Except I/O ports
I/O ports
(2)
(2) (3)
-0.5 4.6
-0.5 V
-0.5 V
DGG package 70
Package thermal impedance
JA
(4)
DL package 63 ° C/W
GQL/ZQL package 42
Storage temperature range -65 150 ° C
stg
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
+ 0.5
CC
+ 0.5 V
CC
3
SN74ALVCHR16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G – DECEMBER 1995 – REVISED OCTOBER 2004
RECOMMENDED OPERATING CONDITIONS
V
CC
V
IH
V
IL
V
I
V
O
I
OH
I
OL
∆ t/ ∆ v Input transition rise or fall rate 10 ns/V
T
A
Supply voltage 1.65 3.6 V
High-level input voltage V
Low-level input voltage V
Input voltage 0 V
Output voltage 0 V
High-level output current mA
Low-level output current mA
Operating free-air temperature -40 85 ° C
(1)
MIN MAX UNIT
V
= 1.65 V to 1.95 V 0.65 × V
CC
= 2.3 V to 2.7 V 1.7 V
CC
V
= 2.7 V to 3.6 V 2
CC
V
= 1.65 V to 1.95 V 0.35 × V
CC
= 2.3 V to 2.7 V 0.7 V
CC
V
= 2.7 V to 3.6 V 0.8
CC
V
= 1.65 V -2
CC
V
= 2.3 V -6
CC
V
= 2.7 V -8
CC
V
= 3 V -12
CC
V
= 1.65 V 2
CC
V
= 2.3 V 6
CC
V
= 2.7 V 8
CC
V
= 3 V 12
CC
CC
CC
CC
CC
V
V
(1) All unused control inputs of the device must be held at V
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
or GND to ensure proper device operation. Refer to the TI application report,
CC
4
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
IOH= -100 µ A 1.65 V to 3.6 V V
IOH= -2 mA 1.65 V 1.2
IOH= -4 mA 2.3 V 1.9
V
OH
V
OL
I
I
I
I(hold)
(3)
I
OZ
I
CC
∆ I
CC
C
Control inputs VI= V
i
C
A or B ports VO= V
io
IOH= -6 mA
IOH= -8 mA 2.7 V 2
IOH= -12 mA 3 V 2
IOL= 100 µ A 1.65 V to 3.6 V 0.2
IOL= 2 mA 1.65 V 0.45
IOL= 4 mA 2.3 V 0.4
IOL= 6 mA
IOL= 8 mA 2.7 V 0.6
IOL= 12 mA 3 V 0.8
VI= V
or GND 3.6 V ± 5 µ A
CC
VI= 0.58 V 25
VI= 1.07 V -25
VI= 0.7 V 45
VI= 1.7 V -45 µ A
VI= 0.8 V 75
VI= 2 V -75
VI= 0 to 3.6 V
VO= V
VI= V
One input at V
(2)
or GND 3.6 V ± 10 µ A
CC
or GND, IO= 0 3.6 V 40 µ A
CC
- 0.6 V, Other inputs at V
CC
or GND 3.3 V 4 pF
CC
or GND 3.3 V 9 pF
CC
or GND 3 V to 3.6 V 750 µ A
CC
SN74ALVCHR16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G – DECEMBER 1995 – REVISED OCTOBER 2004
CC
MIN TYP
- 0.2
CC
2.3 V 1.7 V
3 V 2.4
2.3 V 0.55 V
3 V 0.55
1.65 V
2.3 V
3 V
3.6 V ± 500
(1)
MAX UNIT
(1) All typical values are at V
(2) This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to
= 3.3 V, TA= 25 ° C.
CC
another.
(3) For I/O ports, the parameter IOZincludes the input leakage current.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
V
= 2.5 V V
V
= 1.8 V V
PARAMETER UNIT
t
pd
t
en
t
dis
FROM TO
(INPUT) (OUTPUT)
A or B B or A
OE B or A
OE B or A
CC
TYP MIN MAX MIN MAX MIN MAX
(1)
(1)
(1)
CC
± 0.2 V ± 0.3 V
= 2.7 V
CC
1 4.9 4.7 1 4.2 ns
1 6.8 6.7 1 5.6 ns
1 6.3 5.7 1 5.5 ns
(1) This information was not available at the time of publication.
= 3.3 V
CC
5