Texas Instruments SN74ALVCH16409DGGR, SN74ALVCH16409DL, SN74ALVCH16409DLR Datasheet

SN74ALVCH16409

9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER

WITH 3-STATE OUTPUTS

SCES022E – JULY 1995 – REVISED FEBRUARY 1999

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Member of the Texas Instruments

Widebus+

 Family

D

EPIC

 (Enhanced-Performance Implanted

CMOS) Submicron Process

D

UBE

 (Universal Bus Exchanger) Allows

Synchronous Data Exchange

D

ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)

D

Latch-Up Performance Exceeds 250 mA Per
JESD 17

D

Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors

D

Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages

description

This 9-bit, 4-port universal bus exchanger is
designed for 1.65-V to 3.6-V V

CC

operation.

The SN74AL VCH16409 allows synchronous data
exchange between four different buses. Data flow
is controlled by the select (SEL0–SEL4) inputs. A
data-flow state is stored on the rising edge of the
clock (CLK) input if the select-enable (SELEN

)
input is low. Once a data-flow state has been
established, data is stored in the flip-flop on the
rising edge of CLK if SELEN

is high.

The data-flow control logic is designed to allow
glitch-free data transmission.

When preset (PRE

) transitions high, the outputs are disabled immediately , without waiting for a clock pulse. To

leave the high-impedance state, both PRE

and SELEN must be low and a clock pulse must be applied.

T o ensure the high-impedance state during power up or power down, PRE

should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16409 is characterized for operation from –40°C to 85°C.

Copyright  1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC, UBE, and Widebus+ are trademarks of Texas Instruments Incorporated.

DGG OR DL PACKAGE

(TOP VIEW)

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56
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PRE

SEL0

1A1

GND

1A2
1A3

V

CC

1A4
1A5
1A6

GND

1A7
1A8
1A9
2A1
2A2
2A3

GND

2A4
2A5
2A6

V

CC

2A7
2A8

GND

2A9
SEL1
SEL2

CLK
SELEN
1B1
GND
1B2
1B3
V

CC

1B4
1B5
1B6
GND
1B7
1B8
1B9
2B1
2B2
2B3
GND
2B4
2B5
2B6
V

CC

2B7
2B8
GND
2B9
SEL4
SEL3

SN74ALVCH16409
9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
WITH 3-STATE OUTPUTS

SCES022E – JULY 1995 – REVISED FEBRUARY 1999

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function Tables

INPUTS

OUTPUT

CLK SEND PORT

RECEIVE PORT

X X B

0

†

X LL
XHH

↑LL
↑HH

HXB

0

†

LXB

0

†

†

Output level before the indicated steady-state
input conditions were established

DATA-FLOW CONTROL

INPUTS

PRE SELEN CLK SEL0 SEL1 SEL2 SEL3 SEL4

DATA FLOW

H X X X X X X X All outputs disabled
L H ↑ X X X X X No change
L L ↑ 0 0 0 0 0 None, all I/Os off
L L ↑ 0 0 0 0 1 Not used
L L ↑ 0 0 0 1 0 Not used
L L ↑ 0 0 0 1 1 Not used
L L ↑ 0 0 1 0 0 Not used
L L ↑ 0 0 1 0 1 Not used
L L ↑ 0 0 1 1 0 Not used
L L ↑ 0 0 1 1 1 Not used
L L ↑ 0 1 0 0 0 2A to 1A and 1B to 2B
L L ↑ 0 1 0 0 1 2A to 1A
L L ↑ 0 1 0 1 0 2B to 1B
L L ↑ 0 1 0 1 1 2A to 1A and 2B to 1B
L L ↑ 0 1 1 0 0 1A to 2A and 1B to 2B
L L ↑ 0 1 1 0 1 1A to 2A
L L ↑ 0 1 1 1 0 1B to 2B
L L ↑ 0 1 1 1 1 1A to 2A and 2B to 1B
L L ↑ 1 0 0 0 0 1A to 1B and 2B to 2A
L L ↑ 1 0 0 0 1 1A to 1B
L L ↑ 1 0 0 1 0 2A to 2B
L L ↑ 1 0 0 1 1 1A to 1B and 2A to 2B
L L ↑ 1 0 1 0 0 1B to 1A and 2A to 2B
L L ↑ 1 0 1 0 1 1B to 1A
L L ↑ 1 0 1 1 0 2B to 2A
L L ↑ 1 0 1 1 1 1B to 1A and 2B to 2A
L L ↑ 1 1 0 0 0 2B to 1A and 2A to 1B
L L ↑ 1 1 0 0 1 1B to 2A
L L ↑ 1 1 0 1 0 2B to 1A
L L ↑ 1 1 0 1 1 2B to 1A and 1B to 2A
L L ↑ 1 1 1 0 0 1A to 2B and 1B to 2A
L L ↑ 1 1 1 0 1 1A to 2B
L L ↑ 1 1 1 1 0 2A to 1B
L L ↑ 1 1 1 1 1 1A to 2B and 2A to 1B

SN74ALVCH16409

9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER

WITH 3-STATE OUTPUTS

SCES022E – JULY 1995 – REVISED FEBRUARY 1999

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

Flow and Storage Control

One of Nine Channels

3 3

33

CLK

CLK

D

D

CLK

CLK

D

D

1Ax

2Ax

1Bx

2Bx

1Ax
1Bx
2Bx

2Ax
1Bx
2Bx

1Ax
2Ax
1Bx

1Ax
2Ax
2Bx

SEL2

SEL3

SEL4

1B

2B

CLK

SELEN

SEL0

SEL1

1A

2A

56

55

2

27

28

29

30

PRE

1

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage range, V

CC

–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I

: Except I/O ports (see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I/O ports (see Notes 1 and 2) –0.5 V to V

CC

+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, V

O

(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I

IK

(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, I

OK

(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

O

±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through each V

CC

or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

JA

(see Note 3): DGG package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DL package 74°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. This value is limited to 4.6 V maximum.

3. The package thermal impedance is calculated in accordance with JESD 51.

SN74ALVCH16409
9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
WITH 3-STATE OUTPUTS

SCES022E – JULY 1995 – REVISED FEBRUARY 1999

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 4)

MIN MAX UNIT

V

CC

Supply voltage 1.65 3.6 V

VCC = 1.65 V to 1.95 V 0.65 × V

CC

V

IH

High-level input voltage

VCC = 2.3 V to 2.7 V

1.7

V
VCC = 2.7 V to 3.6 V 2
VCC = 1.65 V to 1.95 V 0.35 × V

CC

V

IL

Low-level input voltage

VCC = 2.3 V to 2.7 V

0.7

V
VCC = 2.7 V to 3.6 V 0.8

V

I

Input voltage 0 V

CC

V

V

O

Output voltage 0 V

CC

V
VCC = 1.65 V –4

p

VCC = 2.3 V –12

IOHHigh-level output current

VCC = 2.7 V –12

mA

VCC = 3 V –24
VCC = 1.65 V 4

p

VCC = 2.3 V 12

IOLLow-level output current

VCC = 2.7 V 12

mA

VCC = 3 V 24

∆t/∆v Input transition rise or fall rate 10 ns/V
T

A

Operating free-air temperature –40 85 °C

NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs

, literature number SCBA004.