Texas Instruments SN74ALVCH162830DBBR, SN74ALVCH162830GR Datasheet
SN74ALVCH162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES082G – AUGUST 1996 – REVISED JUNE 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Member of the Texas Instruments
Widebus
Family
D
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Output Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Packaged in Thin Very Small-Outline
Package
NOTE: For tape and reel order entry:
The DBBR package is abbreviated to GR.
description
This 1-bit to 2-bit address driver is designed for
1.65-V to 3.6-V V
CC
operation.
Active bus-hold circuitry is provided to hold
unused or floating inputs at a valid logic level.
The outputs, which are designed to sink up to
12 mA, include equivalent 26-Ω resistors to
reduce overshoot and undershoot.
T o ensure the high-impedance state during power
up or power down, OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN74ALVCH162830 is characterized for
operation from –40°C to 85°C.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DBB PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
2Y2
1Y2
GND
2Y1
1Y1
V
CC
A1
A2
GND
A3
A4
GND
A5
A6
V
CC
A7
A8
GND
A9
OE1
OE2
A10
GND
A1 1
A12
V
CC
A13
A14
GND
A15
A16
GND
A17
A18
V
CC
2Y18
1Y18
GND
2Y17
1Y17
1Y3
2Y3
GND
1Y4
2Y4
V
CC
1Y5
2Y5
GND
1Y6
2Y6
GND
1Y7
2Y7
V
CC
1Y8
2Y8
GND
1Y9
2Y9
1Y10
2Y10
GND
1Y1 1
2Y1 1
V
CC
1Y12
2Y12
GND
1Y13
2Y13
GND
1Y14
2Y14
V
CC
1Y15
2Y15
GND
1Y16
2Y16
SN74ALVCH162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES082G – AUGUST 1996 – REVISED JUNE 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUTS
OE1 OE2 A 1Yn 2Yn
L H H H Z
L HLLZ
HLHZH
HLLZL
LLHHH
LLLLL
HHXZZ
logic diagram (positive logic)
To 17 Other Channels
1Y1
2Y1
A1
OE2
OE1
21
20
7
5
4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Notes 1 and 2) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through each V
CC
or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3) 106°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
SN74ALVCH162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES082G – AUGUST 1996 – REVISED JUNE 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
MIN MAX UNIT
V
CC
Supply voltage 1.65 3.6 V
VCC = 1.65 V to 1.95 V 0.65 × V
CC
V
IH
High-level input voltage
VCC = 2.3 V to 2.7 V
1.7
V
VCC = 2.7 V to 3.6 V 2
VCC = 1.65 V to 1.95 V 0.35 × V
CC
V
IL
Low-level input voltage
VCC = 2.3 V to 2.7 V 0.7
V
VCC = 2.7 V to 3.6 V 0.8
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
VCC = 1.65 V –2
p
VCC = 2.3 V –6
IOHHigh-level output current
VCC = 2.7 V –8
mA
VCC = 3 V –12
VCC = 1.65 V 2
p
VCC = 2.3 V 6
IOLLow-level output current
VCC = 2.7 V 8
mA
VCC = 3 V 12
∆t/∆v Input transition rise or fall rate 10 ns/V
T
A
Operating free-air temperature –40 85 °C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
Loading...