Texas Instruments SN74ALVC164245DGGR, SN74ALVC164245DL, SN74ALVC164245DLR Datasheet
OPERATION
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
D
Member of the Texas Instruments
D
Widebus
EPIC
Family
(Enhanced-Performance Implanted
CMOS) Submicron Process
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 16-bit (dual-octal) noninverting bus
transceiver contains two separate supply rails;
B port has V
V
, which is set to operate at 3.3 V . This allows
CCA
for translation from a 3.3-V to a 5-V environment
and vice versa.
The SN74ALVC164245 is designed for
asynchronous communication between data
buses.
T o ensure the high-impedance state during power
up or power down, the output-enable (OE
should be tied to V
minimum value of the resistor is determined by the
current-sinking capability of the driver.
The SN74ALVC164245 is characterized for
operation from –40°C to 85°C.
, which is set at 5 V , and A port has
CCB
through a pullup resistor; the
CC
) input
DGG OR DL PACKAGE
1DIR
1B1
1B2
GND
1B3
1B4
(5 V) V
CCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
(5 V) V
CCB
2B5
2B6
GND
2B7
2B8
2DIR
(TOP VIEW)
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
V
CCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CCA
2A5
2A6
GND
2A7
2A8
2OE
(3.3 V)
(3.3 V)
FUNCTION TABLE
(each 8-bit section)
INPUTS
DIR
OE
L L B data to A bus
L H A data to B bus
H X Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
logic symbol
†
1OE
1DIR
2OE
2DIR
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
48
1
25
24
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
G3
3 EN1 [BA]
3 EN2 [AB]
G6
6 EN4 [BA]
6 EN5 [AB]
1
4
2
1B1
2
5
11
12
13
14
16
17
19
20
22
23
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1DIR
1A1
1
47
To Seven Other Channels
48
1OE
2
1B1
2DIR
2A1
24
36
To Seven Other Channels
25
13
2OE
2B1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALVC164245
16-BIT 3.3-V TO 5-V LEVEL SHIFTING TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS416F – MARCH 1994 – REVISED FEBRUARY 1999
absolute maximum ratings over operating free-air temperature range for V
at 3.3 V (unless otherwise noted)
V
CCA
Supply voltage range: V
Input voltage range, V
CCA
V
CCB
: Except I/O ports (see Note 1) –0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
I/O port A (see Note 2) –0.5 V to V
I/O port B (see Note 1) –0.5 V to V
Input clamp current, I
Output clamp current, I
(VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
OK
Continuous output current, I
Continuous current through each V
Package thermal impedance, θ
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
(see Note 3): DGG package 89°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
†
or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
at 5 V and
CCB
CCA
CCB
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 94°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. This value is limited to 6 V maximum.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions for V
V
V
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 10 ns/V
T
NOTE 4: All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application
Supply voltage 4.5 5.5 V
CCB
High-level input voltage 2 V
IH
Low-level input voltage 0.8 V
IL
Input voltage 0 V
IA
Output voltage 0 V
OB
High-level output current –24 mA
Low-level output current 24 mA
Operating free-air temperature –40 85 °C
A
report,
Implications of Slow or Floating CMOS Inputs
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
at 5 V (see Note 4)
CCB
, literature number SCBA004.
MIN MAX UNIT
CCB
CCB
V
V
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
Loading...