DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
S0
1A0
1A1
1A2
1A3
1W
S2
DQA1
DQA2
DQA3
DQA4
GND
V
CC
S1
2A3
2A2
2A1
2A0
2W
S3
DQB4
DQB3
DQB2
DQB1
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Each Register File Has Individual
Write-Enable Controls and Address Lines
• Designed Specifically for Multibus
Architecture and Overlapping File
Operations
• Prioritized B-Input Port Prevents Write
Conflicts During Dual-Input Mode
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
description
This device features two 16-word by 4-bit register
files. Each register file has individual write-enable
(1W
, 2W) controls and address lines. This device has two 4-bit data I/O ports (DQA1–DQA4 and DQB1–DQB4).
The data I/O ports can output to bus A and bus B, receive input from bus A and bus B, receive input from bus
A and output to bus B, or output to bus A and receive input from bus B. To prevent writing conflicts in the
dual-input mode, the B-input port takes priority . Two select (S0 and S1) lines control which port has access to
which register. S2 determines whether the A ports are in the input or the output modes and S3 does likewise
for the B ports. The address lines (1A0–1A3 or 2A0–2A3) are decoded by an internal 1-of-16 decoder to select
which register word is to be accessed. All outputs are 3-state buffer-type outputs designed specifically to drive
bus lines directly.
The SN74ALS870 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
FILE SELECT
INPUT/OUTPUT
S0 S1 FILE SEL S2 S3 I/O SEL
L L 1R to A, 1R to B
H L 2R to A, 1R to B
L H 1R to A, 2R to B
LLA out, B out
H H 2R to A, 2R to B
L L A to 1R, 1R to B
H L A to 2R, 1R to B
L H A to 1R, 2R to B
HLA in, B out
H H A to 2R, 2R to B
L L 1R to A, B to 1R
H L 2R to A, B to 1R
L H 1R to A, B to 2R
LHA out, B in
H H 2R to A, B to 2R
L L B to 1R
H L A to 2R, B to 1R
L H A to 1R, B to 2R
HHA in, B in
H H B to 2R
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUAR Y 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
DQB2
14
DQB3
15
DQB4
16
DQA2
9
DQA3
10
DQA4
11
1A
0
15
0
2
1A0
3
1A1
4
1A2
3
5
1A3
0
19
2A0
20
2A1
21
2A2
3
22
2A3
C0/G10
1
S0
EN12 [A out]
C4
6
DQB1
13
Z7
C1/G11
23
S1
C2 [A in]
7
S2
C5
18
EN13 [B out]
C3 [B in]
17
S3
1W
2W
9,10
8
9
MUX MUX
[REG FILE 16 × 4]
2A
0
15
12
8,10
11
11
Z8
6
7
RAM 16 × 1
[REG 1]
1A,0
,2(1/3)4D
1A,1
,3,4D
1A
13
Z9
6
7
RAM 16 × 1
[REG 2]
2A,0,2(1
/3)5D
2A,1,3,5D
2A
DQA1
8
Z6
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
REG1
REG2
Decoder
BIN/Y
16
1
2
3
4
15
0
Decoder
BIN/Y
16
1
2
3
4
15
0
16 16
Three Identical Channels Not Shown
2A0
2A1
2A2
2A3
DQB1
1A0
1A1
1A2
1A3
S0
S1
S2
S3
1W
2W
DQA1
RAM 16×1
A
A,D
15
0
A
A
A,D
15
0
A
RAM 16×1
2
3
4
5
1
23
7
17
6
18
8
19
20
21
22
13
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: All inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUAR Y 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
I
OH
High-level output current –2.6 mA
I
OL
Low-level output current 24 mA
t
w
Pulse duration, write 12 ns
Address before write↓ 5
t
su
Setup time
Data before write↑
15
ns
Select before write↓ 12
Address before write↓ 0
t
h
Hold time
Data before write↑ 0
ns
Select before write↓ 12
T
A
Operating free-air temperature 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2
V
OH
VCC = 4.5 V, IOH = –2.6 mA 2.4 3.2
V
V
OL
VCC = 4.5 V, IOL = 24 mA 0.35 0.5 V
Control inputs
VI = 7 V 0.1
I
I
DQA and DQB ports
V
CC
= 5.5
V
VI = 5.5 V 0.2
mA
1W and 2W 20
I
IH
Other control inputs
VCC = 5.5 V, VI = 2.7 V
40
µA
DQA and DQB ports
‡
50
Control inputs
–0.2
I
IL
DQA and DQB ports
‡
V
CC
=
5.5 V
,
V
I
=
0.4 V
–0.2
mA
I
O
§
VCC = 5.5 V, VO = 2.25 V –30 –112 mA
I
CC
VCC = 5.5 V 80 110 mA
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
For I/O ports, the parameters IIH and IIL include the off-state output current.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω
,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
MIN MAX
t
a(A)
Any A
Any DQ
3 19 ns
S0
Any DQA
3 15
t
a(S)
S1
Any DQB
3 15
ns
S2
Any DQA
3 14
t
dis
S3
Any DQB
3 14
ns
S2
Any DQA
3 17
t
en
S3
Any DQB
3 17
ns
W
Any DQ
5 23
t
pd
DQA
DQB
5 26
ns
DQB
DQA
5 26
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN74ALS870
DUAL 16-BY-4 REGISTER FILES
SDAS139A – DECEMBER 1982 – REVISED JANUAR Y 1995
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
t
PHZ
t
PLZ
t
PHL
t
PLH
0.3 V
t
PZL
t
PZH
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test
Test
Point
R1
S1
C
L
(see Note A)
7 V
1.3 V
1.3 V1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V 1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
1.3 V 1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
V
OL
V
OH
V
OH
V
OL
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
[
0 V
V
OH
V
OL
[
3.5 V
In-Phase
Output
0.3 V
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
R2
V
CC
R
L
Test
Point
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
From Output
Under Test
Test
Point
C
L
(see Note A)
R
L
RL = R1 = R2
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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